[oe-commits] org.oe.dev qemu: Add arm nptl patch (as used in scratchbox) to fix EABI locale generation, add version 0.8.2, apply patches to some fixed verisons
rpurdie commit
openembedded-commits at lists.openembedded.org
Sat Aug 26 16:52:55 UTC 2006
qemu: Add arm nptl patch (as used in scratchbox) to fix EABI locale generation, add version 0.8.2, apply patches to some fixed verisons
Author: rpurdie at openembedded.org
Branch: org.openembedded.dev
Revision: 63decb6aa1ee12796bfe41161f90c134b755d63e
ViewMTN: http://monotone.openembedded.org/revision.psp?id=63decb6aa1ee12796bfe41161f90c134b755d63e
Files:
1
packages/qemu/qemu-0.8.0
packages/qemu/qemu-0.8.2
packages/qemu/files/arm_nptl.patch
packages/qemu/qemu-0.8.0/arm_nptl.patch
packages/qemu/qemu-0.8.2/arm_nptl.patch
packages/qemu/qemu-native_0.8.2.bb
packages/qemu/qemu_0.8.2.bb
packages/qemu/qemu-native_0.8.0.bb
packages/qemu/qemu_0.8.0.bb
packages/qemu/qemu_cvs.bb
Diffs:
#
# mt diff -r4a577a9951c18f1d0fc283b8283e170639de59d6 -r63decb6aa1ee12796bfe41161f90c134b755d63e
#
#
#
# add_dir "packages/qemu/qemu-0.8.0"
#
# add_dir "packages/qemu/qemu-0.8.2"
#
# add_file "packages/qemu/files/arm_nptl.patch"
# content [27bc6e62f26492c8790da9925148bda76b8334cf]
#
# add_file "packages/qemu/qemu-0.8.0/arm_nptl.patch"
# content [016f29f3795a711d8a8aa599d875331c21d9c08f]
#
# add_file "packages/qemu/qemu-0.8.2/arm_nptl.patch"
# content [ef24759aff73f52385d670c99a52236f6751287b]
#
# add_file "packages/qemu/qemu-native_0.8.2.bb"
# content [df5180d897d3694524fdb54b7babaa465c601f78]
#
# add_file "packages/qemu/qemu_0.8.2.bb"
# content [8a56f1bcc97d63c5ec246de90c881e65aae5976b]
#
# patch "packages/qemu/qemu-native_0.8.0.bb"
# from [919ae06691b7b6200b1e58604231206c08d36d7d]
# to [df5180d897d3694524fdb54b7babaa465c601f78]
#
# patch "packages/qemu/qemu_0.8.0.bb"
# from [03d390da0c09b1deca69b35968167d8f08b67ab1]
# to [6d2c74e9bd2e674639cae91170dad85592828a48]
#
# patch "packages/qemu/qemu_cvs.bb"
# from [ce680f2b2e6f9e496f16c25693ebb8c7b554ab18]
# to [d9fcf5ed09a5cc555c0e172fd302029b99b71a67]
#
============================================================
--- packages/qemu/files/arm_nptl.patch 27bc6e62f26492c8790da9925148bda76b8334cf
+++ packages/qemu/files/arm_nptl.patch 27bc6e62f26492c8790da9925148bda76b8334cf
@@ -0,0 +1,857 @@
+Index: qemu/configure
+===================================================================
+--- qemu.orig/configure 2006-08-14 22:09:39.000000000 +0100
++++ qemu/configure 2006-08-14 22:38:54.000000000 +0100
+@@ -96,6 +96,7 @@
+ user="no"
+ build_docs="no"
+ uname_release=""
++nptl="yes"
+
+ # OS specific
+ targetos=`uname -s`
+@@ -240,6 +241,8 @@
+ ;;
+ --enable-uname-release=*) uname_release="$optarg"
+ ;;
++ --disable-nptl) nptl="no"
++ ;;
+ esac
+ done
+
+@@ -438,6 +441,23 @@
+ fi
+ fi
+
++# check NPTL support
++cat > $TMPC <<EOF
++#include <sched.h>
++void foo()
++{
++#ifndef CLONE_SETTLS
++#error bork
++#endif
++}
++EOF
++
++if $cc -c -o $TMPO $TMPC 2> /dev/null ; then
++ :
++else
++ nptl="no"
++fi
++
+ ##########################################
+ # SDL probe
+
+@@ -556,6 +576,7 @@
+ fi
+ echo "FMOD support $fmod $fmod_support"
+ echo "kqemu support $kqemu"
++echo "NPTL support $nptl"
+ echo "Documentation $build_docs"
+ [ ! -z "$uname_release" ] && \
+ echo "uname -r $uname_release"
+@@ -864,6 +885,14 @@
+ echo "SDL_CFLAGS=`$sdl_config --cflags`" >> $config_mak
+ fi
+ fi
++else
++ if test "$nptl" = "yes" ; then
++ case "$target_cpu" in
++ arm | armeb)
++ echo "#define USE_NPTL 1" >> $config_h
++ ;;
++ esac
++ fi
+ fi
+
+ if test "$cocoa" = "yes" ; then
+Index: qemu/exec-all.h
+===================================================================
+--- qemu.orig/exec-all.h 2006-05-26 18:10:52.000000000 +0100
++++ qemu/exec-all.h 2006-08-14 22:37:29.000000000 +0100
+@@ -347,163 +347,7 @@
+ extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];
+ extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];
+
+-#ifdef __powerpc__
+-static inline int testandset (int *p)
+-{
+- int ret;
+- __asm__ __volatile__ (
+- "0: lwarx %0,0,%1\n"
+- " xor. %0,%3,%0\n"
+- " bne 1f\n"
+- " stwcx. %2,0,%1\n"
+- " bne- 0b\n"
+- "1: "
+- : "=&r" (ret)
+- : "r" (p), "r" (1), "r" (0)
+- : "cr0", "memory");
+- return ret;
+-}
+-#endif
+-
+-#ifdef __i386__
+-static inline int testandset (int *p)
+-{
+- long int readval = 0;
+-
+- __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
+- : "+m" (*p), "+a" (readval)
+- : "r" (1)
+- : "cc");
+- return readval;
+-}
+-#endif
+-
+-#ifdef __x86_64__
+-static inline int testandset (int *p)
+-{
+- long int readval = 0;
+-
+- __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
+- : "+m" (*p), "+a" (readval)
+- : "r" (1)
+- : "cc");
+- return readval;
+-}
+-#endif
+-
+-#ifdef __s390__
+-static inline int testandset (int *p)
+-{
+- int ret;
+-
+- __asm__ __volatile__ ("0: cs %0,%1,0(%2)\n"
+- " jl 0b"
+- : "=&d" (ret)
+- : "r" (1), "a" (p), "0" (*p)
+- : "cc", "memory" );
+- return ret;
+-}
+-#endif
+-
+-#ifdef __alpha__
+-static inline int testandset (int *p)
+-{
+- int ret;
+- unsigned long one;
+-
+- __asm__ __volatile__ ("0: mov 1,%2\n"
+- " ldl_l %0,%1\n"
+- " stl_c %2,%1\n"
+- " beq %2,1f\n"
+- ".subsection 2\n"
+- "1: br 0b\n"
+- ".previous"
+- : "=r" (ret), "=m" (*p), "=r" (one)
+- : "m" (*p));
+- return ret;
+-}
+-#endif
+-
+-#ifdef __sparc__
+-static inline int testandset (int *p)
+-{
+- int ret;
+-
+- __asm__ __volatile__("ldstub [%1], %0"
+- : "=r" (ret)
+- : "r" (p)
+- : "memory");
+-
+- return (ret ? 1 : 0);
+-}
+-#endif
+-
+-#ifdef __arm__
+-static inline int testandset (int *spinlock)
+-{
+- register unsigned int ret;
+- __asm__ __volatile__("swp %0, %1, [%2]"
+- : "=r"(ret)
+- : "0"(1), "r"(spinlock));
+-
+- return ret;
+-}
+-#endif
+-
+-#ifdef __mc68000
+-static inline int testandset (int *p)
+-{
+- char ret;
+- __asm__ __volatile__("tas %1; sne %0"
+- : "=r" (ret)
+- : "m" (p)
+- : "cc","memory");
+- return ret;
+-}
+-#endif
+-
+-#ifdef __ia64
+-#include <ia64intrin.h>
+-
+-static inline int testandset (int *p)
+-{
+- return __sync_lock_test_and_set (p, 1);
+-}
+-#endif
+-
+-typedef int spinlock_t;
+-
+-#define SPIN_LOCK_UNLOCKED 0
+-
+-#if defined(CONFIG_USER_ONLY)
+-static inline void spin_lock(spinlock_t *lock)
+-{
+- while (testandset(lock));
+-}
+-
+-static inline void spin_unlock(spinlock_t *lock)
+-{
+- *lock = 0;
+-}
+-
+-static inline int spin_trylock(spinlock_t *lock)
+-{
+- return !testandset(lock);
+-}
+-#else
+-static inline void spin_lock(spinlock_t *lock)
+-{
+-}
+-
+-static inline void spin_unlock(spinlock_t *lock)
+-{
+-}
+-
+-static inline int spin_trylock(spinlock_t *lock)
+-{
+- return 1;
+-}
+-#endif
++#include "qemu_spinlock.h"
+
+ extern spinlock_t tb_lock;
+
+Index: qemu/linux-user/arm/syscall.h
+===================================================================
+--- qemu.orig/linux-user/arm/syscall.h 2005-04-27 21:11:21.000000000 +0100
++++ qemu/linux-user/arm/syscall.h 2006-08-14 22:37:29.000000000 +0100
+@@ -28,7 +28,9 @@
+ #define ARM_SYSCALL_BASE 0x900000
+ #define ARM_THUMB_SYSCALL 0
+
+-#define ARM_NR_cacheflush (ARM_SYSCALL_BASE + 0xf0000 + 2)
++#define ARM_NR_BASE 0xf0000
++#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
++#define ARM_NR_set_tls (ARM_NR_BASE + 5)
+
+ #define ARM_NR_semihosting 0x123456
+ #define ARM_NR_thumb_semihosting 0xAB
+Index: qemu/linux-user/main.c
+===================================================================
+--- qemu.orig/linux-user/main.c 2006-05-26 18:11:01.000000000 +0100
++++ qemu/linux-user/main.c 2006-08-14 22:37:29.000000000 +0100
+@@ -331,6 +331,50 @@
+ }
+ }
+
++/* Handle a jump to the kernel code page. */
++static int
++do_kernel_trap(CPUARMState *env)
++{
++ uint32_t addr;
++ uint32_t *ptr;
++ uint32_t cpsr;
++
++ switch (env->regs[15]) {
++ case 0xffff0fc0: /* __kernel_cmpxchg */
++ /* XXX: This only works between threads, not between processes.
++ Use native atomic operations. */
++ /* ??? This probably breaks horribly if the access segfaults. */
++ cpu_lock();
++ ptr = (uint32_t *)env->regs[2];
++ cpsr = cpsr_read(env);
++ if (*ptr == env->regs[0]) {
++ *ptr = env->regs[1];
++ env->regs[0] = 0;
++ cpsr |= CPSR_C;
++ } else {
++ env->regs[0] = -1;
++ cpsr &= ~CPSR_C;
++ }
++ cpsr_write(env, cpsr, CPSR_C);
++ cpu_unlock();
++ break;
++ case 0xffff0fe0: /* __kernel_get_tls */
++ env->regs[0] = env->cp15.c13_tls;
++ break;
++ default:
++ return 1;
++ }
++ /* Jump back to the caller. */
++ addr = env->regs[14];
++ if (addr & 1) {
++ env->thumb = 1;
++ addr &= ~1;
++ }
++ env->regs[15] = addr;
++
++ return 0;
++}
++
+ void cpu_loop(CPUARMState *env)
+ {
+ int trapnr;
+@@ -387,10 +431,8 @@
+ }
+ }
+
+- if (n == ARM_NR_cacheflush) {
+- arm_cache_flush(env->regs[0], env->regs[1]);
+- } else if (n == ARM_NR_semihosting
+- || n == ARM_NR_thumb_semihosting) {
++ if (n == ARM_NR_semihosting
++ || n == ARM_NR_thumb_semihosting) {
+ env->regs[0] = do_arm_semihosting (env);
+ } else if (n == 0 || n >= ARM_SYSCALL_BASE
+ || (env->thumb && n == ARM_THUMB_SYSCALL)) {
+@@ -401,14 +443,34 @@
+ n -= ARM_SYSCALL_BASE;
+ env->eabi = 0;
+ }
+- env->regs[0] = do_syscall(env,
+- n,
+- env->regs[0],
+- env->regs[1],
+- env->regs[2],
+- env->regs[3],
+- env->regs[4],
+- env->regs[5]);
++ if ( n > ARM_NR_BASE) {
++ switch (n)
++ {
++ case ARM_NR_cacheflush:
++ arm_cache_flush(env->regs[0], env->regs[1]);
++ break;
++#ifdef USE_NPTL
++ case ARM_NR_set_tls:
++ cpu_set_tls(env, env->regs[0]);
++ env->regs[0] = 0;
++ break;
++#endif
++ default:
++ printf ("Error: Bad syscall: %x\n", n);
++ goto error;
++ }
++ }
++ else
++ {
++ env->regs[0] = do_syscall(env,
++ n,
++ env->regs[0],
++ env->regs[1],
++ env->regs[2],
++ env->regs[3],
++ env->regs[4],
++ env->regs[5]);
++ }
+ } else {
+ goto error;
+ }
+@@ -447,6 +509,10 @@
+ }
+ }
+ break;
++ case EXCP_KERNEL_TRAP:
++ if (do_kernel_trap(env))
++ goto error;
++ break;
+ default:
+ error:
+ fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
+@@ -1649,6 +1715,10 @@
+ ts->heap_base = info->brk;
+ /* This will be filled in on the first SYS_HEAPINFO call. */
+ ts->heap_limit = 0;
++ /* Register the magic kernel code page. The cpu will generate a
++ special exception when it tries to execute code here. We can't
++ put real code here because it may be in use by the host kernel. */
++ page_set_flags(0xffff0000, 0xffff0fff, 0);
+ }
+ #elif defined(TARGET_SPARC)
+ {
+Index: qemu/linux-user/qemu.h
+===================================================================
+--- qemu.orig/linux-user/qemu.h 2006-05-26 18:11:01.000000000 +0100
++++ qemu/linux-user/qemu.h 2006-08-14 22:37:29.000000000 +0100
+@@ -76,6 +76,9 @@
+ uint32_t v86mask;
+ #endif
+ int used; /* non zero if used */
++#ifdef USE_NPTL
++ uint32_t *child_tidptr;
++#endif
+ uint8_t stack[0];
+ } __attribute__((aligned(16))) TaskState;
+
+Index: qemu/linux-user/syscall.c
+===================================================================
+--- qemu.orig/linux-user/syscall.c 2006-05-26 18:11:01.000000000 +0100
++++ qemu/linux-user/syscall.c 2006-08-14 22:44:47.000000000 +0100
+@@ -66,9 +66,18 @@
+ #include <linux/kd.h>
+
+ #include "qemu.h"
++#include "qemu_spinlock.h"
+
+ //#define DEBUG
+
++#ifdef USE_NPTL
++#define CLONE_NPTL_FLAGS2 (CLONE_SETTLS | \
++ CLONE_PARENT_SETTID | CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)
++#else
++/* XXX: Hardcode the above values. */
++#define CLONE_NPTL_FLAGS2 0
++#endif
++
+ #if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC)
+ /* 16 bit uid wrappers emulation */
+ #define USE_UID16
+@@ -1569,20 +1578,38 @@
+ thread/process */
+ #define NEW_STACK_SIZE 8192
+
++#ifdef USE_NPTL
++static spinlock_t nptl_lock = SPIN_LOCK_UNLOCKED;
++#endif
++
+ static int clone_func(void *arg)
+ {
+ CPUState *env = arg;
++#ifdef HAVE_NPTL
++ /* Wait until the parent has finshed initializing the tls state. */
++ while (!spin_trylock(&nptl_lock))
++ usleep(1);
++ spin_unlock(&nptl_lock);
++#endif
+ cpu_loop(env);
+ /* never exits */
+ return 0;
+ }
+
+-int do_fork(CPUState *env, unsigned int flags, unsigned long newsp)
++int do_fork(CPUState *env, unsigned int flags, unsigned long newsp,
++ uint32_t *parent_tidptr, void *newtls,
++ uint32_t *child_tidptr)
+ {
+ int ret;
+ TaskState *ts;
+ uint8_t *new_stack;
+ CPUState *new_env;
++#ifdef USE_NPTL
++ unsigned int nptl_flags;
++
++ if (flags & CLONE_PARENT_SETTID)
++ *parent_tidptr = gettid();
++#endif
+
+ if (flags & CLONE_VM) {
+ ts = malloc(sizeof(TaskState) + NEW_STACK_SIZE);
+@@ -1627,16 +1654,60 @@
+ #error unsupported target CPU
+ #endif
+ new_env->opaque = ts;
++#ifdef USE_NPTL
++ nptl_flags = flags;
++ flags &= ~CLONE_NPTL_FLAGS2;
++ if (nptl_flags & CLONE_CHILD_CLEARTID) {
++ ts->child_tidptr = child_tidptr;
++ }
++ if (nptl_flags & CLONE_SETTLS)
++ cpu_set_tls (new_env, newtls);
++ /* Grab the global cpu lock so that the thread setup appears
++ atomic. */
++ if (nptl_flags & CLONE_CHILD_SETTID)
++ spin_lock(&nptl_lock);
++#else
++ if (flags & CLONE_NPTL_FLAGS2)
++ return -EINVAL;
++#endif
++
+ #ifdef __ia64__
+ ret = __clone2(clone_func, new_stack + NEW_STACK_SIZE, flags, new_env);
+ #else
+ ret = clone(clone_func, new_stack + NEW_STACK_SIZE, flags, new_env);
+ #endif
++#ifdef USE_NPTL
++ if (ret != -1) {
++ if (nptl_flags & CLONE_CHILD_SETTID)
++ *child_tidptr = ret;
++ }
++ /* Allow the child to continue. */
++ if (nptl_flags & CLONE_CHILD_SETTID)
++ spin_unlock(&nptl_lock);
++#endif
+ } else {
+- /* if no CLONE_VM, we consider it is a fork */
+- if ((flags & ~CSIGNAL) != 0)
+- return -EINVAL;
+- ret = fork();
++ /* if no CLONE_VM, we consider it is a fork */
++ if ((flags & ~(CSIGNAL | CLONE_NPTL_FLAGS2)) != 0)
++ return -EINVAL;
++ ret = fork();
++#ifdef USE_NPTL
++ /* There is a race condition here. The parent process could
++ theoretically read the TID in the child process before the child
++ tid is set. This would require using either ptrace
++ (not implemented) or having *_tidptr to point at a shared memory
++ mapping. We can't repeat the spinlock hack used above because
++ the child process gets its own copy of the lock. */
++ if (ret == 0) {
++ /* Child Process. */
++ if (flags & CLONE_CHILD_SETTID)
++ *child_tidptr = gettid();
++ ts = (TaskState *)env->opaque;
++ if (flags & CLONE_CHILD_CLEARTID)
++ ts->child_tidptr = child_tidptr;
++ if (flags %s
>>> DIFF TRUNCATED @ 16K
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