[oe-commits] org.oe.dev ixp4xx-npe: Added 2.1 version from blaster8
rwhitby commit
openembedded-commits at lists.openembedded.org
Fri Sep 15 01:09:23 UTC 2006
ixp4xx-npe: Added 2.1 version from blaster8
Author: rwhitby at nslu2-linux.org
Branch: org.openembedded.dev
Revision: 423d95142798353c0c747b9d7ffc72e03ddd60c0
ViewMTN: http://monotone.openembedded.org/revision.psp?id=423d95142798353c0c747b9d7ffc72e03ddd60c0
Files:
1
packages/ixp4xx/ixp4xx-npe-native-2.1
packages/ixp4xx/ixp4xx-npe-native-2.1/header.patch
packages/ixp4xx/ixp4xx-npe-native_2.1.bb
packages/ixp4xx/ixp4xx-npe_2.1.bb
packages/ixp4xx/ixp4xx-npe_2.3.bb
Diffs:
#
# mt diff -r8156b74b683b22fd001a5c526476023c0a3c9ec8 -r423d95142798353c0c747b9d7ffc72e03ddd60c0
#
#
#
# add_dir "packages/ixp4xx/ixp4xx-npe-native-2.1"
#
# add_file "packages/ixp4xx/ixp4xx-npe-native-2.1/header.patch"
# content [77a03ac9edf799c2d73e368efe811012bea911eb]
#
# add_file "packages/ixp4xx/ixp4xx-npe-native_2.1.bb"
# content [b9e4c09a2b4c72de8190caffff4b49f608c3bce3]
#
# add_file "packages/ixp4xx/ixp4xx-npe_2.1.bb"
# content [5aab33349df854bbcf26d2c86da12852fe531186]
#
# patch "packages/ixp4xx/ixp4xx-npe_2.3.bb"
# from [61398a865b7b51f0af718bb0e0b4e36619b5408e]
# to [9dc0ddb4e1b4b88d5f01b3321f4061008df63403]
#
============================================================
--- packages/ixp4xx/ixp4xx-npe-native-2.1/header.patch 77a03ac9edf799c2d73e368efe811012bea911eb
+++ packages/ixp4xx/ixp4xx-npe-native-2.1/header.patch 77a03ac9edf799c2d73e368efe811012bea911eb
@@ -0,0 +1,121 @@
+diff -Naur a/IxNpeMicrocode.h b/IxNpeMicrocode.h
+--- a/IxNpeMicrocode.h 1970-01-01 01:00:00.000000000 +0100
++++ b/IxNpeMicrocode.h 2006-08-24 14:26:31.000000000 +0100
+@@ -0,0 +1,117 @@
++/*
++ * IxNpeMicrocode.h - Headerfile for compiling the Intel microcode C file
++ *
++ * Copyright (C) 2006 Christian Hohnstaedt <chohnstaedt at innominate.com>
++ *
++ * This file is released under the GPLv2
++ *
++ *
++ * compile with
++ *
++ * gcc -Wall IxNpeMicrocode.c -o IxNpeMicrocode
++ *
++ * Executing the resulting binary on your build-host creates the
++ * "NPE-[ABC].xxxxxxxx" files containing the selected microcode
++ *
++ * fetch the IxNpeMicrocode.c from the Intel Access Library.
++ * It will include this header.
++ *
++ * select Images for every NPE from the following
++ * (used C++ comments for easy uncommenting ....)
++ */
++
++// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_MASK_FIREWALL_VLAN_QOS_HDR_CONV_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEA_HSS_TSLOT_SWITCH
++// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
++// #define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
++#define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL
++// #define IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT
++// #define IX_NPEDL_NPEIMAGE_NPEA_DMA
++// #define IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT
++// #define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT
++// #define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT
++// #define IX_NPEDL_NPEIMAGE_NPEA_HSS0
++// #define IX_NPEDL_NPEIMAGE_NPEA_WEP
++
++
++// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_MASK_FIREWALL_VLAN_QOS_HDR_CONV_EXTMIB
++#define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEB_DMA
++// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
++// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
++// #define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL
++
++
++// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_MASK_FIREWALL_VLAN_QOS_HDR_CONV_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB
++// #define IX_NPEDL_NPEIMAGE_NPEC_DMA
++// #define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_AES_ETH_LEARN_FILTER_SPAN
++#define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_AES_ETH_LEARN_FILTER_FIREWALL
++// #define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_AES_CCM_ETH
++// #define IX_NPEDL_NPEIMAGE_NPEC_CRYPTO_ETH_LEARN_FILTER_SPAN_FIREWALL
++// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
++// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
++// #define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL
++
++
++#include <stdio.h>
++#include <unistd.h>
++#include <netinet/in.h>
++#include <sys/types.h>
++#include <sys/stat.h>
++#include <fcntl.h>
++#include <errno.h>
++
++struct dl_image {
++ unsigned magic;
++ unsigned id;
++ unsigned size;
++ unsigned data[0];
++};
++
++const unsigned IxNpeMicrocode_array[];
++
++int main(int argc, char *argv[])
++{
++ struct dl_image *image = (struct dl_image *)IxNpeMicrocode_array;
++ int imgsiz, i, fd, cnt;
++ const unsigned *arrayptr = IxNpeMicrocode_array;
++ const char *names[] = { "IXP425", "IXP465", "unknown" };
++
++ for (image = (struct dl_image *)arrayptr, cnt=0;
++ (image->id != 0xfeedf00d) && (image->magic == 0xfeedf00d);
++ image = (struct dl_image *)(arrayptr), cnt++)
++ {
++ unsigned char field[4];
++ imgsiz = image->size + 3;
++ *(unsigned*)field = ntohl(image->id);
++ char filename[40], slnk[10];
++
++ sprintf(filename, "NPE-%c.%08x", (field[0] & 0xf) + 'A',
++ image->id);
++ sprintf(slnk, "NPE-%c", (field[0] & 0xf) + 'A');
++ printf("Writing image: %s.NPE_%c Func: %2x Rev: %02x.%02x "
++ "Size: %5d to: '%s'\n",
++ names[field[0] >> 4], (field[0] & 0xf) + 'A',
++ field[1], field[2], field[3], imgsiz*4, filename);
++ fd = open(filename, O_CREAT | O_RDWR | O_TRUNC, 0644);
++ if (fd >= 0) {
++ for (i=0; i<imgsiz; i++) {
++ *(unsigned*)field = ntohl(arrayptr[i]);
++ write(fd, field, sizeof(field));
++ }
++ close(fd);
++ unlink(slnk);
++ symlink(filename, slnk);
++ } else {
++ perror(filename);
++ }
++ arrayptr += imgsiz;
++ }
++ close(fd);
++ return 0;
++}
============================================================
--- packages/ixp4xx/ixp4xx-npe-native_2.1.bb b9e4c09a2b4c72de8190caffff4b49f608c3bce3
+++ packages/ixp4xx/ixp4xx-npe-native_2.1.bb b9e4c09a2b4c72de8190caffff4b49f608c3bce3
@@ -0,0 +1,18 @@
+DESCRIPTION = "Firmware converter for the IXP4xx line of devices"
+MAINTAINER = "Oyvind Repvik <nail at nslu2-linux.org>"
+LICENSE = "Intel Public Licence"
+PR = "r1"
+
+SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400NpeLibrary-2_1.zip"
+SRC_URI += "file://header.patch;patch=1"
+inherit native
+S = ${WORKDIR}/ixp400_xscale_sw/src/npeDl
+
+do_compile() {
+ ${CC} -Wall IxNpeMicrocode.c -o IxNpeMicrocode
+}
+
+do_stage() {
+ install -d ${STAGING_BINDIR}/
+ install -m 0755 IxNpeMicrocode ${STAGING_BINDIR}/IxNpeMicrocode
+}
============================================================
--- packages/ixp4xx/ixp4xx-npe_2.1.bb 5aab33349df854bbcf26d2c86da12852fe531186
+++ packages/ixp4xx/ixp4xx-npe_2.1.bb 5aab33349df854bbcf26d2c86da12852fe531186
@@ -0,0 +1,20 @@
+DESCRIPTION = "NPE firmware for the IXP4xx line of devices"
+MAINTAINER = "Oyvind Repvik <nail at nslu2-linux.org>"
+LICENSE = "Intel Public Licence"
+PR = "r3"
+DEPENDS = "ixp4xx-npe-native"
+
+SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400NpeLibrary-2_1.zip"
+S = ${WORKDIR}/ixp400_xscale_sw/src/npeDl
+
+FILES_${PN} = "${base_libdir}/firmware/NPE-B/NPE-B.010c0200"
+
+do_compile() {
+ ${STAGING_BINDIR}/IxNpeMicrocode
+}
+
+do_install() {
+ install -d ${D}/${base_libdir}/firmware/NPE-B
+ install ${S}/NPE-B.010c0200 ${D}/${base_libdir}/firmware/NPE-B/
+}
+
============================================================
--- packages/ixp4xx/ixp4xx-npe_2.3.bb 61398a865b7b51f0af718bb0e0b4e36619b5408e
+++ packages/ixp4xx/ixp4xx-npe_2.3.bb 9dc0ddb4e1b4b88d5f01b3321f4061008df63403
@@ -39,7 +39,7 @@ do_install() {
do_install() {
install -d ${D}/lib/firmware
- install ${S}/NPE-B.010c0200 ${D}/lib/firmware/
+ install ${S}/NPE-B ${D}/lib/firmware/
}
do_stage() {
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