[oe-commits] org.oe.dev merge of '81566ccb8400689db54be19c2d4bbb9bcab8a73b'
hrw commit
openembedded-commits at lists.openembedded.org
Mon Aug 27 20:32:18 UTC 2007
merge of '81566ccb8400689db54be19c2d4bbb9bcab8a73b'
and 'c386b75d3046ae9a229198121bffd56b36b626c6'
Author: hrw at openembedded.org
Branch: org.openembedded.dev
Revision: 9b318dc0ed758bbc0cbe978a0ff4471831b1df53
ViewMTN: http://monotone.openembedded.org/revision.psp?id=9b318dc0ed758bbc0cbe978a0ff4471831b1df53
Files:
1
packages/linux/linux/alix/geode-mfgpt-clock-event-device-support.patch
packages/linux/linux/alix/geode-mfgpt-support-for-geode-class-machines.patch
packages/openssl/openssl-0.9.7g/armeb.patch.lock
packages/openssl/openssl-0.9.7g/debian.patch.lock
packages/openssl/openssl-0.9.7g/gnueabi-arm.patch.lock
packages/openssl/openssl-0.9.7g/gnueabi-armeb.patch.lock
packages/openssl/openssl-0.9.7g/uclibcgnueabi.patch
conf/distro/include/angstrom.inc
conf/machine/include/tune-arm1136jf-s.conf
conf/machine/include/tune-arm920t.conf
conf/machine/include/tune-arm926ejs.conf
conf/machine/include/tune-xscale.conf
packages/linux/linux-handhelds-2.6/h2200/defconfig
packages/openssl/openssl_0.9.7g.bb
Diffs:
#
# mt diff -r81566ccb8400689db54be19c2d4bbb9bcab8a73b -r9b318dc0ed758bbc0cbe978a0ff4471831b1df53
#
#
#
# add_file "packages/linux/linux/alix/geode-mfgpt-clock-event-device-support.patch"
# content [d0e230915059acdf6b19ea60e86d9936b545c098]
#
# add_file "packages/linux/linux/alix/geode-mfgpt-support-for-geode-class-machines.patch"
# content [c55a38ac6a13fc66730cc600ffa2effc475670a6]
#
============================================================
--- packages/linux/linux/alix/geode-mfgpt-clock-event-device-support.patch d0e230915059acdf6b19ea60e86d9936b545c098
+++ packages/linux/linux/alix/geode-mfgpt-clock-event-device-support.patch d0e230915059acdf6b19ea60e86d9936b545c098
@@ -0,0 +1,237 @@
+From: Andres Salomon <dilinger at queued.net>
+
+Add support for an MFGPT clock event device; this allows us to use MFGPTs as
+the basis for high-resolution timers.
+
+Signed-off-by: Jordan Crouse <jordan.crouse at amd.com>
+Signed-off-by: Andres Salomon <dilinger at debian.org>
+Cc: Andi Kleen <ak at suse.de>
+Cc: Alan Cox <alan at lxorguk.ukuu.org.uk>
+Cc: john stultz <johnstul at us.ibm.com>
+Cc: Thomas Gleixner <tglx at linutronix.de>
+Cc: Ingo Molnar <mingo at elte.hu>
+Signed-off-by: Andrew Morton <akpm at linux-foundation.org>
+---
+
+ Documentation/kernel-parameters.txt | 4
+ arch/i386/Kconfig | 10 +
+ arch/i386/kernel/mfgpt.c | 165 ++++++++++++++++++++++++++
+ 3 files changed, 179 insertions(+)
+
+--- linux-2.6.22.orig/Documentation/kernel-parameters.txt
++++ linux-2.6.22/Documentation/kernel-parameters.txt
+@@ -1012,6 +1012,10 @@
+ meye.*= [HW] Set MotionEye Camera parameters
+ See Documentation/video4linux/meye.txt.
+
++ mfgpt_irq= [IA-32] Specify the IRQ to use for the
++ Multi-Function General Purpose Timers on AMD Geode
++ platforms.
++
+ mga= [HW,DRM]
+
+ migration_cost=
+--- linux-2.6.22.orig/arch/i386/Kconfig
++++ linux-2.6.22/arch/i386/Kconfig
+@@ -1190,6 +1190,16 @@
+ processor goes idle (as is done by the scheduler). The
+ other workaround is idle=poll boot option.
+
++config GEODE_MFGPT_TIMER
++ bool "Geode Multi-Function General Purpose Timer (MFGPT) events"
++ depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
++ default y
++ help
++ This driver provides a clock event source based on the MFGPT
++ timer(s) in the CS5535 and CS5536 companion chip for the geode.
++ MFGPTs have a better resolution and max interval than the
++ generic PIT, and are suitable for use as high-res timers.
++
+ config K8_NB
+ def_bool y
+ depends on AGP_AMD64
+--- linux-2.6.22.orig/arch/i386/kernel/mfgpt.c
++++ linux-2.6.22/arch/i386/kernel/mfgpt.c
+@@ -48,6 +48,12 @@
+ #define MFGPT_HZ (32000 / MFGPT_DIVISOR)
+ #define MFGPT_PERIODIC (MFGPT_HZ / HZ)
+
++#ifdef CONFIG_GEODE_MFGPT_TIMER
++static int __init mfgpt_timer_setup(void);
++#else
++#define mfgpt_timer_setup() (0)
++#endif
++
+ /* Allow for disabling of MFGPTs */
+ static int disable;
+ static int __init mfgpt_disable(char *s)
+@@ -82,6 +88,9 @@
+ }
+ }
+
++ /* set up clock event device, if desired */
++ i = mfgpt_timer_setup();
++
+ return count;
+ }
+
+@@ -197,3 +206,159 @@
+ return -1;
+ }
+ EXPORT_SYMBOL(geode_mfgpt_alloc_timer);
++
++#ifdef CONFIG_GEODE_MFGPT_TIMER
++
++/*
++ * The MFPGT timers on the CS5536 provide us with suitable timers to use
++ * as clock event sources - not as good as a HPET or APIC, but certainly
++ * better then the PIT. This isn't a general purpose MFGPT driver, but
++ * a simplified one designed specifically to act as a clock event source.
++ * For full details about the MFGPT, please consult the CS5536 data sheet.
++ */
++
++#include <linux/clocksource.h>
++#include <linux/clockchips.h>
++
++static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
++static u16 mfgpt_event_clock;
++
++static int irq = 7;
++static int __init mfgpt_setup(char *str)
++{
++ get_option(&str, &irq);
++ return 1;
++}
++__setup("mfgpt_irq=", mfgpt_setup);
++
++static inline void mfgpt_disable_timer(u16 clock)
++{
++ u16 val = geode_mfgpt_read(clock, MFGPT_REG_SETUP);
++ geode_mfgpt_write(clock, MFGPT_REG_SETUP, val & ~MFGPT_SETUP_CNTEN);
++}
++
++static int mfgpt_next_event(unsigned long, struct clock_event_device *);
++static void mfgpt_set_mode(enum clock_event_mode, struct clock_event_device *);
++
++static struct clock_event_device mfgpt_clockevent = {
++ .name = "mfgpt-timer",
++ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
++ .set_mode = mfgpt_set_mode,
++ .set_next_event = mfgpt_next_event,
++ .rating = 250,
++ .cpumask = CPU_MASK_ALL,
++ .shift = 32
++};
++
++static inline void mfgpt_start_timer(u16 clock, u16 delta)
++{
++ geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_CMP2, (u16) delta);
++ geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
++
++ geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
++ MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
++}
++
++static void mfgpt_set_mode(enum clock_event_mode mode,
++ struct clock_event_device *evt)
++{
++ mfgpt_disable_timer(mfgpt_event_clock);
++
++ if (mode == CLOCK_EVT_MODE_PERIODIC)
++ mfgpt_start_timer(mfgpt_event_clock, MFGPT_PERIODIC);
++
++ mfgpt_tick_mode = mode;
++}
++
++static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
++{
++ mfgpt_start_timer(mfgpt_event_clock, delta);
++ return 0;
++}
++
++/* Assume (foolishly?), that this interrupt was due to our tick */
++
++static irqreturn_t mfgpt_tick(int irq, void *dev_id)
++{
++ if (mfgpt_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
++ return IRQ_HANDLED;
++
++ /* Turn off the clock */
++ mfgpt_disable_timer(mfgpt_event_clock);
++
++ /* Clear the counter */
++ geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
++
++ /* Restart the clock in periodic mode */
++
++ if (mfgpt_tick_mode == CLOCK_EVT_MODE_PERIODIC) {
++ geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
++ MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
++ }
++
++ mfgpt_clockevent.event_handler(&mfgpt_clockevent);
++ return IRQ_HANDLED;
++}
++
++static struct irqaction mfgptirq = {
++ .handler = mfgpt_tick,
++ .flags = IRQF_DISABLED | IRQF_NOBALANCING,
++ .mask = CPU_MASK_NONE,
++ .name = "mfgpt-timer"
++};
++
++static int __init mfgpt_timer_setup(void)
++{
++ int timer, ret;
++ u16 val;
++
++ timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING,
++ THIS_MODULE);
++ if (timer < 0) {
++ printk(KERN_ERR "mfgpt-timer: Could not allocate a MFPGT "
++ "timer\n");
++ return -ENODEV;
++ }
++
++ mfgpt_event_clock = timer;
++ /* Set the clock scale and enable the event mode for CMP2 */
++ val = MFGPT_SCALE | (3 << 8);
++
++ geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP, val);
++
++ /* Set up the IRQ on the MFGPT side */
++ if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
++ printk(KERN_ERR "mfgpt-timer: Could not set up IRQ %d\n", irq);
++ return -EIO;
++ }
++
++ /* And register it with the kernel */
++ ret = setup_irq(irq, &mfgptirq);
++
++ if (ret) {
++ printk(KERN_ERR "mfgpt-timer: Unable to set up the "
++ "interrupt.\n");
++ goto err;
++ }
++
++ /* Set up the clock event */
++ mfgpt_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC, 32);
++ mfgpt_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
++ &mfgpt_clockevent);
++ mfgpt_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
++ &mfgpt_clockevent);
++
++ printk(KERN_INFO "mfgpt-timer: registering the MFGT timer as a "
++ "clock event.\n");
++ clockevents_register_device(&mfgpt_clockevent);
++
++ return 0;
++
++err:
++ geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
++ printk(KERN_ERR "mfgpt-timer: Unable to set up the MFGPT clock "
++ "source\n");
++ return -EIO;
++}
++
++#endif
============================================================
--- packages/linux/linux/alix/geode-mfgpt-support-for-geode-class-machines.patch c55a38ac6a13fc66730cc600ffa2effc475670a6
+++ packages/linux/linux/alix/geode-mfgpt-support-for-geode-class-machines.patch c55a38ac6a13fc66730cc600ffa2effc475670a6
@@ -0,0 +1,311 @@
+From: Andres Salomon <dilinger at queued.net>
+
+This adds support for Multi-Function General Purpose Timers. It detects the
+available timers during southbridge init, and provides an API for allocating
+and setting the timers. They're higher resolution than the standard PIT, so
+the MFGPTs come in handy for quite a few things.
+
+Note that we never clobber the timers that the BIOS might have opted to use;
+we just check for unused timers.
+
+Signed-off-by: Jordan Crouse <jordan.crouse at amd.com>
+Signed-off-by: Andres Salomon <dilinger at debian.org>
+Cc: Andi Kleen <ak at suse.de>
+Cc: Alan Cox <alan at lxorguk.ukuu.org.uk>
+Signed-off-by: Andrew Morton <akpm at linux-foundation.org>
+---
+
+ Documentation/kernel-parameters.txt | 3
+ arch/i386/kernel/Makefile | 2
+ arch/i386/kernel/geode.c | 4
+ arch/i386/kernel/mfgpt.c | 199 ++++++++++++++++++++++++++
+ include/asm-i386/geode.h | 50 ++++++
+ 5 files changed, 257 insertions(+), 1 deletion(-)
+
+--- linux-2.6.22.orig/arch/i386/kernel/Makefile
++++ linux-2.6.22/arch/i386/kernel/Makefile
+@@ -40,7 +40,7 @@
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+ obj-$(CONFIG_HPET_TIMER) += hpet.o
+ obj-$(CONFIG_K8_NB) += k8.o
+-obj-$(CONFIG_MGEODE_LX) += geode.o
++obj-$(CONFIG_MGEODE_LX) += geode.o mfgpt.o
+
+ obj-$(CONFIG_VMI) += vmi.o vmiclock.o
+ obj-$(CONFIG_PARAVIRT) += paravirt.o
+--- linux-2.6.22.orig/arch/i386/kernel/geode.c
++++ linux-2.6.22/arch/i386/kernel/geode.c
+@@ -146,10 +146,14 @@
+
+ static int __init geode_southbridge_init(void)
+ {
++ int timers;
++
+ if (!is_geode())
+ return -ENODEV;
+
+ init_lbars();
++ timers = geode_mfgpt_detect();
++ printk(KERN_INFO "geode: %d MFGPT timers available.\n", timers);
+ return 0;
+ }
+
+--- /dev/null
++++ linux-2.6.22/arch/i386/kernel/mfgpt.c
+@@ -0,0 +1,199 @@
++/*
++ * Driver/API for AMD Geode Multi-Function General Purpose Timers (MFGPT)
++ *
++ * Copyright (C) 2006, Advanced Micro Devices, Inc.
++ * Copyright (C) 2007, Andres Salomon <dilinger at debian.org>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of version 2 of the GNU General Public License
++ * as published by the Free Software Foundation.
++ *
++ * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
++ */
++
++/*
++ * We are using the 32Khz input clock - its the only one that has the
++ * ranges we find desirable. The following table lists the suitable
++ * divisors and the associated hz, minimum interval
++ * and the maximum interval:
++ *
++ * Divisor Hz Min Delta (S) Max Delta (S)
++ * 1 32000 .0005 2.048
++ * 2 16000 .001 4.096
++ * 4 8000 .002 8.192
++ * 8 4000 .004 16.384
++ * 16 2000 .008 32.768
++ * 32 1000 .016 65.536
++ * 64 500 .032 131.072
++ * 128 250 .064 262.144
++ * 256 125 .128 524.288
++ */
++
++#include <linux/kernel.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <asm/geode.h>
++
++#define F_AVAIL 0x01
++
++static struct mfgpt_timer_t {
++ int flags;
++ struct module *owner;
++} mfgpt_timers[MFGPT_MAX_TIMERS];
++
++/* Selected from the table above */
++
++#define MFGPT_DIVISOR 16
++#define MFGPT_SCALE 4 /* divisor = 2^(scale) */
++#define MFGPT_HZ (32000 / MFGPT_DIVISOR)
++#define MFGPT_PERIODIC (MFGPT_HZ / HZ)
++
++/* Allow for disabling of MFGPTs */
++static int disable;
++static int __init mfgpt_disable(char *s)
++{
++ disable = 1;
++ return 1;
++}
++__setup("nomfgpt", mfgpt_disable);
++
++/*
++ * Check whether any MFGPTs are available for the kernel to use. In most
++ * cases, firmware that uses AMD's VSA code will claim all timers during
++ * bootup; we certainly don't want to take them if they're already in use.
++ * In other cases (such as with VSAless OpenFirmware), the system firmware
++ * leaves timers available for us to use.
++ */
++int __init geode_mfgpt_detect(void)
++{
++ int count = 0, i;
++ u16 val;
++
++ if (disable) {
++ printk(KERN_INFO "geode-mfgpt: Skipping MFGPT setup\n");
++ return 0;
++ }
++
++ for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
++ val = geode_mfgpt_read(i, MFGPT_REG_SETUP);
++ if (!(val & MFGPT_SETUP_SETUP)) {
++ mfgpt_timers[i].flags = F_AVAIL;
++ count++;
++ }
++ }
++
++ return count;
++}
++
++int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
++{
++ u32 msr, mask, value, dummy;
++ int shift = (cmp == MFGPT_CMP1) ? 0 : 8;
++
++ if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
++ return -EIO;
++
++ /*
++ * The register maps for these are described in sections 6.17.1.x of
++ * the AMD Geode CS5536 Companion Device Data Book.
++ */
++ switch (event) {
++ case MFGPT_EVENT_RESET:
++ /*
++ * XXX: According to the docs, we cannot reset timers above
++ * 6; that is, resets for 7 and 8 will be ignored. Is this
++ * a problem? -dilinger
++ */
++ msr = MFGPT_NR_MSR;
++ mask = 1 << (timer + 24);
++ break;
++
++ case MFGPT_EVENT_NMI:
++ msr = MFGPT_NR_MSR;
++ mask = 1 << (timer + shift);
++ break;
++
++ case MFGPT_EVENT_IRQ:
++ msr = MFGPT_IRQ_MSR;
++ mask = 1 << (timer + shift);
++ break;
++
++ default:
++ return -EIO;
++ }
++
++ rdmsr(msr, value, dummy);
++
++ if (enable)
++ value |= mask;
++ else
++ value &= ~mask;
++
++ wrmsr(msr, value, dummy);
++ return 0;
++}
++EXPORT_SYMBOL(geode_mfgpt_toggle_event);
++
++int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable)
++{
++ u32 val, dummy;
++ int offset;
++
++ if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
++ return -EIO;
++
++ if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
++ return -EIO;
++
++ rdmsr(0x51400022, val, dummy);
++
++ offset = (timer % 4) * 4;
++
++ val &= ~((0xF << offset) | (0xF << (offset + 16)));
++
++ if (enable) {
++ val |= (irq & 0x0F) << (offset);
++ val |= (irq & 0x0F) << (offset + 16);
++ }
++
++ wrmsr(0x51400022, val, dummy);
++ return 0;
++}
++EXPORT_SYMBOL(geode_mfgpt_set_irq);
++
++static int mfgpt_get(int timer, struct module *owner)
++{
++ mfgpt_timers[timer].flags &= ~F_AVAIL;
++ mfgpt_timers[timer].owner = owner;
++ printk(KERN_INFO "geode-mfgpt: Registered timer %d\n", timer);
++ return timer;
++}
++
++int geode_mfgpt_alloc_timer(int timer, int domain, struct module *owner)
++{
++ int i;
++
++ if (!geode_get_dev_base(GEODE_DEV_MFGPT))
++ return -ENODEV;
++ if (timer >= MFGPT_MAX_TIMERS)
++ return -EIO;
++
++ if (timer < 0) {
++ /* Try to find an available timer */
++ for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
++ if (mfgpt_timers[i].flags & F_AVAIL)
++ return mfgpt_get(i, owner);
++
++ if (i == 5 && domain == MFGPT_DOMAIN_WORKING)
++ break;
++ }
++ } else {
++ /* If they requested a specific timer, try to honor that */
++ if (mfgpt_timers[timer].flags & F_AVAIL)
++ return mfgpt_get(timer, owner);
++ }
++
++ /* No timers available - too bad */
++ return -1;
++}
++EXPORT_SYMBOL(geode_mfgpt_alloc_timer);
+--- linux-2.6.22.orig/include/asm-i386/geode.h
++++ linux-2.6.22/include/asm-i386/geode.h
+@@ -156,4 +156,54 @@
+ return (is_geode_gx() || is_geode_lx());
+ }
+
++/* MFGPTs */
++
++#define MFGPT_MAX_TIMERS 8
++#define MFGPT_TIMER_ANY -1
++
++#define MFGPT_DOMAIN_WORKING 1
++#define MFGPT_DOMAIN_STANDBY 2
++#define MFGPT_DOMAIN_ANY (MFGPT_DOMAIN_WORKING | MFGPT_DOMAIN_STANDBY)
++
++#define MFGPT_CMP1 0
++#define MFGPT_CMP2 1
++
++#define MFGPT_EVENT_IRQ 0
++#define MFGPT_EVENT_NMI 1
++#define MFGPT_EVENT_RESET 3
++
++#define MFGPT_REG_CMP1 0
++#define MFGPT_REG_CMP2 2
++#define MFGPT_REG_COUNTER 4
++#define MFGPT_REG_SETUP 6
++
++#define MFGPT_SETUP_CNTEN (1 << 15)
++#define MFGPT_SETUP_CMP2 (1 << 14)
++#define MFGPT_SETUP_CMP1 (1 << 13)
++#define MFGPT_SETUP_SETUP (1 << 12)
++#define MFGPT_SETUP_STOPEN (1 << 11)
++#define MFGPT_SETUP_EXTEN (1 << 10)
++#define MFGPT_SETUP_REVEN (1 << 5)
++#define MFGPT_SETUP_CLKSEL (1 << 4)
++
++static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
++{
++ u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
++ outw(value, base + reg + (timer * 8));
++}
++
++static inline u16 geode_mfgpt_read(int timer, u16 reg)
++{
++ u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
++ return inw(base + reg + (timer * 8));
++}
++
++extern int __init geode_mfgpt_detect(void);
++extern int geode_mfgpt_toggle_event%s
>>> DIFF TRUNCATED @ 16K
#
# mt diff -rc386b75d3046ae9a229198121bffd56b36b626c6 -r9b318dc0ed758bbc0cbe978a0ff4471831b1df53
#
#
#
# add_file "packages/openssl/openssl-0.9.7g/armeb.patch.lock"
# content [da39a3ee5e6b4b0d3255bfef95601890afd80709]
#
# add_file "packages/openssl/openssl-0.9.7g/debian.patch.lock"
# content [da39a3ee5e6b4b0d3255bfef95601890afd80709]
#
# add_file "packages/openssl/openssl-0.9.7g/gnueabi-arm.patch.lock"
# content [da39a3ee5e6b4b0d3255bfef95601890afd80709]
#
# add_file "packages/openssl/openssl-0.9.7g/gnueabi-armeb.patch.lock"
# content [da39a3ee5e6b4b0d3255bfef95601890afd80709]
#
# add_file "packages/openssl/openssl-0.9.7g/uclibcgnueabi.patch"
# content [bd1bc954b5c2e8539a39128f09661d686716eba9]
#
# patch "conf/distro/include/angstrom.inc"
# from [043bdb9ee8805eeed9861b06795cf28aa5761f77]
# to [bc404e4b107f132331ca124ae5f643298bdf3840]
#
# patch "conf/machine/include/tune-arm1136jf-s.conf"
# from [5a3e5932acd2c4060744b80a29575afe2d4371c9]
# to [eb16d920f5e4b5c23d60ef7eeb3c4dc30ba84f11]
#
# patch "conf/machine/include/tune-arm920t.conf"
# from [207e404a30f6a151d53f88ddffbff128b41d77b3]
# to [90b20a2b9db56011eaade4f5842ba8b4a8584126]
#
# patch "conf/machine/include/tune-arm926ejs.conf"
# from [e966494e533757a3d1a62411aad183ba18be3ea3]
# to [c76a174d9339a3b351d5f39e293bf9321cac008f]
#
# patch "conf/machine/include/tune-xscale.conf"
# from [32838c82d74894c143d5d6c15c5202f982358479]
# to [8823c4bff3c359eb9700b6eafb600e2820f129a3]
#
# patch "packages/linux/linux-handhelds-2.6/h2200/defconfig"
# from [5567dff5dd14cc8563bdc9ccd4f03ae945e4c1d2]
# to [09af962af20bc3d0a2a4b656f06577e664c2ec7c]
#
# patch "packages/openssl/openssl_0.9.7g.bb"
# from [68560d0bda19a0b32c7f514bdb9cf445479e7406]
# to [145744ceb1c1d90a5eb05ddcd4947d5f569402ab]
#
============================================================
--- packages/openssl/openssl-0.9.7g/armeb.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
+++ packages/openssl/openssl-0.9.7g/armeb.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
============================================================
--- packages/openssl/openssl-0.9.7g/debian.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
+++ packages/openssl/openssl-0.9.7g/debian.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
============================================================
--- packages/openssl/openssl-0.9.7g/gnueabi-arm.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
+++ packages/openssl/openssl-0.9.7g/gnueabi-arm.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
============================================================
--- packages/openssl/openssl-0.9.7g/gnueabi-armeb.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
+++ packages/openssl/openssl-0.9.7g/gnueabi-armeb.patch.lock da39a3ee5e6b4b0d3255bfef95601890afd80709
============================================================
--- packages/openssl/openssl-0.9.7g/uclibcgnueabi.patch bd1bc954b5c2e8539a39128f09661d686716eba9
+++ packages/openssl/openssl-0.9.7g/uclibcgnueabi.patch bd1bc954b5c2e8539a39128f09661d686716eba9
@@ -0,0 +1,12 @@
+--- /tmp/Configure.patched 2007-08-27 18:34:23.412489103 +0200
++++ openssl-0.9.7g/Configure 2007-08-27 18:35:05.134866725 +0200
+@@ -478,6 +478,9 @@
+ "linux-elf-armeb","gcc:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "linux-gnueabi-arm","gcc:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "linux-gnueabi-armeb","gcc:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-uclibcgnueabi-arm","gcc:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-uclibcgnueabi-armeb","gcc:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++
+
+ # SCO/Caldera targets.
+ #
============================================================
--- conf/distro/include/angstrom.inc 043bdb9ee8805eeed9861b06795cf28aa5761f77
+++ conf/distro/include/angstrom.inc bc404e4b107f132331ca124ae5f643298bdf3840
@@ -233,7 +233,6 @@ TINDER_CLOBBER = "1"
## 0 for rebuilding everything from scratch
## 1 for incremental builds
TINDER_CLOBBER = "1"
-TINDER_AUTOBUILD = "1"
## Do a report at all
TINDER_REPORT = "1"
============================================================
--- conf/machine/include/tune-arm1136jf-s.conf 5a3e5932acd2c4060744b80a29575afe2d4371c9
+++ conf/machine/include/tune-arm1136jf-s.conf eb16d920f5e4b5c23d60ef7eeb3c4dc30ba84f11
@@ -1,2 +1,3 @@ TARGET_CC_ARCH = "-march=armv6j -mtune=a
TARGET_CC_ARCH = "-march=armv6j -mtune=arm1136jf-s -mfpu=vfp -mfloat-abi=softfp"
+FEED_ARCH = "armv6"
PACKAGE_ARCH = "armv6"
============================================================
--- conf/machine/include/tune-arm920t.conf 207e404a30f6a151d53f88ddffbff128b41d77b3
+++ conf/machine/include/tune-arm920t.conf 90b20a2b9db56011eaade4f5842ba8b4a8584126
@@ -1,3 +1,4 @@
+FEED_ARCH = "armv4t"
PACKAGE_ARCH = "armv4t"
TARGET_CC_ARCH = "-march=armv4t -mtune=arm920t"
============================================================
--- conf/machine/include/tune-arm926ejs.conf e966494e533757a3d1a62411aad183ba18be3ea3
+++ conf/machine/include/tune-arm926ejs.conf c76a174d9339a3b351d5f39e293bf9321cac008f
@@ -1,3 +1,5 @@
+FEED_ARCH = "armv5te"
+
# For gcc 3.x you need:
#TARGET_CC_ARCH = "-march=armv5te -mtune=arm926ejs"
# For gcc 4.x you need:
============================================================
--- conf/machine/include/tune-xscale.conf 32838c82d74894c143d5d6c15c5202f982358479
+++ conf/machine/include/tune-xscale.conf 8823c4bff3c359eb9700b6eafb600e2820f129a3
@@ -1,3 +1,5 @@
+FEED_ARCH = "armv5te"
+
TARGET_CC_ARCH = "-march=armv5te -mtune=xscale"
TARGET_CC_KERNEL_ARCH = "-march=armv5te -mtune=xscale"
PACKAGE_ARCH = "${@['armv5teb', 'armv5te'][bb.data.getVar('SITEINFO_ENDIANESS', d, 1) == 'le']}"
============================================================
--- packages/linux/linux-handhelds-2.6/h2200/defconfig 5567dff5dd14cc8563bdc9ccd4f03ae945e4c1d2
+++ packages/linux/linux-handhelds-2.6/h2200/defconfig 09af962af20bc3d0a2a4b656f06577e664c2ec7c
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.21-hh11
-# Wed Jul 11 07:31:37 2007
+# Linux kernel version: 2.6.21-hh12
+# Mon Aug 27 19:05:20 2007
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -295,7 +295,7 @@ CONFIG_BINFMT_ELF=y
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BINFMT_MISC is not set
+CONFIG_BINFMT_MISC=m
#
# Power management options
@@ -319,6 +319,10 @@ CONFIG_UNIX=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
@@ -337,7 +341,7 @@ CONFIG_IP_PNP=y
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -351,9 +355,22 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# IP: Virtual Server Configuration
#
# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
@@ -373,6 +390,12 @@ CONFIG_NETFILTER=y
# CONFIG_IP_NF_ARPTABLES is not set
#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP6_NF_QUEUE is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+
+#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
@@ -480,7 +503,14 @@ CONFIG_BT_HCIUART_BCSP=y
# CONFIG_BT_HCIBLUECARD is not set
# CONFIG_BT_HCIBTUART is not set
# CONFIG_BT_HCIVHCI is not set
-# CONFIG_IEEE80211 is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+# CONFIG_IEEE80211_CRYPT_TKIP is not set
+CONFIG_IEEE80211_SOFTMAC=m
+# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
+CONFIG_WIRELESS_EXT=y
#
# Device Drivers
@@ -672,16 +702,36 @@ CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
+CONFIG_TUN=m
#
# PHY device support
#
+CONFIG_PHYLIB=m
#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_SMSC_PHY=m
+CONFIG_BROADCOM_PHY=m
+CONFIG_FIXED_PHY=m
+CONFIG_FIXED_MII_10_FDX=y
+CONFIG_FIXED_MII_100_FDX=y
+
+#
# Ethernet (10 or 100Mbit)
#
-# CONFIG_NET_ETHERNET is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+CONFIG_SMC91X=m
+CONFIG_DM9000=m
+CONFIG_SMC911X=m
#
# Ethernet (1000 Mbit)
@@ -698,9 +748,49 @@ CONFIG_NETDEVICES=y
#
# Wireless LAN (non-hamradio)
#
-# CONFIG_NET_RADIO is not set
+CONFIG_NET_RADIO=y
+CONFIG_NET_WIRELESS_RTNETLINK=y
#
+# Obsolete Wireless cards support (pre-802.11)
+#
+# CONFIG_STRIP is not set
+# CONFIG_PCMCIA_WAVELAN is not set
+# CONFIG_PCMCIA_NETWAVE is not set
+
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+# CONFIG_PCMCIA_RAYCS is not set
+
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+CONFIG_HERMES=m
+CONFIG_ATMEL=m
+
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+CONFIG_PCMCIA_HERMES=m
+CONFIG_PCMCIA_SPECTRUM=m
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_PCMCIA_WL3501=m
+CONFIG_USB_ZD1201=m
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
+CONFIG_HOSTAP_CS=m
+CONFIG_ZD1211RW=m
+# CONFIG_ZD1211RW_DEBUG is not set
+CONFIG_ACX=m
+CONFIG_ACX_USB=y
+# CONFIG_ACX_MEM is not set
+# CONFIG_ACX_CS is not set
+CONFIG_NET_WIRELESS=y
+
+#
# PCMCIA network device support
#
# CONFIG_NET_PCMCIA is not set
@@ -717,7 +807,7 @@ CONFIG_PPP_MPPE=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_MPPE=m
-# CONFIG_PPPOE is not set
+CONFIG_PPPOE=m
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_SHAPER is not set
@@ -1139,8 +1229,8 @@ CONFIG_USB_SL811_CS=m
#
# USB Device Class drivers
#
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -1186,12 +1276,28 @@ CONFIG_USB_HID=m
#
# USB Network Adapters
#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET_MII is not set
-# CONFIG_USB_USBNET is not set
+CONFIG_USB_CATC=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_USBNET_MII=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_ZAURUS=m
CONFIG_USB_MON=y
#
@@ -1201,7 +1307,58 @@ CONFIG_USB_MON=y
#
# USB Serial Converter support
#
-# CONFIG_USB_SERIAL is not set
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_AIRPRIME=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP2101=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_FUNSOFT=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_SAFE=m
+# CONFIG_USB_SERIAL_SAFE_PADDED is not set
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_DEBUG=m
+CONFIG_USB_EZUSB=y
#
# USB Miscellaneous drivers
@@ -1537,7 +1694,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_AES is not set
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
============================================================
--- packages/openssl/openssl_0.9.7g.bb 68560d0bda19a0b32c7f514bdb9cf445479e7406
+++ packages/openssl/openssl_0.9.7g.bb 145744ceb1c1d90a5eb05ddcd4947d5f569402ab
@@ -1,10 +1,11 @@ require openssl.inc
inherit pkgconfig
require openssl.inc
-PR = "r4"
+PR = "r5"
SRC_URI += "file://debian.patch;patch=1 \
file://armeb.patch;patch=1;pnum=0 \
file://gnueabi-arm.patch;patch=1 \
+ file://gnueabi-armeb.patch;patch=1 \
+ file://uclibcgnueabi.patch;patch=1"
- file://gnueabi-armeb.patch;patch=1"
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