[oe-commits] org.oe.dev gcc 4.2.1: add patches for maverick crunch on ep93xx (That's an FPU)
koen commit
openembedded-commits at lists.openembedded.org
Thu Aug 30 15:03:10 UTC 2007
gcc 4.2.1: add patches for maverick crunch on ep93xx (That's an FPU)
Author: koen at openembedded.org
Branch: org.openembedded.dev
Revision: 1f260b572bf0fcb18091a97b1f497db496993761
ViewMTN: http://monotone.openembedded.org/revision.psp?id=1f260b572bf0fcb18091a97b1f497db496993761
Files:
1
packages/gcc/gcc-4.2.1/arm-crunch-20000320.patch
packages/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch
packages/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch
packages/gcc/gcc-4.2.1/arm-crunch-64bit-disable0.patch
packages/gcc/gcc-4.2.1/arm-crunch-and-or.patch
packages/gcc/gcc-4.2.1/arm-crunch-cfcvt64-disable.patch
packages/gcc/gcc-4.2.1/arm-crunch-cfcvtds-disable.patch
packages/gcc/gcc-4.2.1/arm-crunch-cirrus-bugfixes.patch
packages/gcc/gcc-4.2.1/arm-crunch-compare-geu.patch
packages/gcc/gcc-4.2.1/arm-crunch-compare-unordered.patch
packages/gcc/gcc-4.2.1/arm-crunch-compare-unordered.patch-z-eq
packages/gcc/gcc-4.2.1/arm-crunch-compare.patch
packages/gcc/gcc-4.2.1/arm-crunch-compare.patch-z-eq
packages/gcc/gcc-4.2.1/arm-crunch-dominance.patch
packages/gcc/gcc-4.2.1/arm-crunch-eabi-ieee754-div.patch
packages/gcc/gcc-4.2.1/arm-crunch-eabi-ieee754.patch
packages/gcc/gcc-4.2.1/arm-crunch-eabi.patch
packages/gcc/gcc-4.2.1/arm-crunch-floatsi-disable-single.patch
packages/gcc/gcc-4.2.1/arm-crunch-floatsi-disable.patch
packages/gcc/gcc-4.2.1/arm-crunch-floatunsidf.patch
packages/gcc/gcc-4.2.1/arm-crunch-fp_consts.patch
packages/gcc/gcc-4.2.1/arm-crunch-neg.patch
packages/gcc/gcc-4.2.1/arm-crunch-neg2.patch
packages/gcc/gcc-4.2.1/arm-crunch-offset.patch
packages/gcc/gcc-4.2.1/arm-crunch-predicates.patch
packages/gcc/gcc-4.2.1/arm-crunch-predicates2.patch
packages/gcc/gcc-4.2.1/arm-crunch-predicates3.patch
packages/gcc/gcc-4.2.1/arm-crunch-saveregs.patch
packages/gcc/gcc-4.2.1/arm-crunch-scc.patch
packages/gcc/gcc-4.2.1/arm-crunch-truncsi-disable-new.patch
packages/gcc/gcc-4.2.1/arm-crunch-truncsi-disable.patch
packages/gcc/gcc-cross_4.2.1.bb
packages/gcc/gcc_4.2.1.bb
Diffs:
#
# mt diff -r592b476df2c8569826428b6d22ef478cda0a6b63 -r1f260b572bf0fcb18091a97b1f497db496993761
#
#
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-20000320.patch"
# content [e97270c4d5ad4cc5b6e9df24a1006a46e117b3c9]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch"
# content [f46cf21c24bc42893937104af8d69ec7e0a0de5c]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch"
# content [945f41c575544d95b695fd9380bcf6b68635ca14]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-64bit-disable0.patch"
# content [a8060fa9b12c0adea192fd04e26ef15f23153f7b]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-and-or.patch"
# content [7825dc9c8f504e7e74f7a02679438b03efdce970]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-cfcvt64-disable.patch"
# content [e3c5f109784cf6461831e0a71c606b54b2ac2029]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-cfcvtds-disable.patch"
# content [4f63e685efafcede9c1c44d89172473b88f49e4f]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-cirrus-bugfixes.patch"
# content [ba4a234344e24b0abade3d2100712328284a6b0a]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-compare-geu.patch"
# content [e5a56198f5afe794dc8a79032b10e4e194bf2f90]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-compare-unordered.patch"
# content [ca7217de7a57efe5f6c389943c2401d735f66716]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-compare-unordered.patch-z-eq"
# content [7cff05e4ecdc53f7cb330c2d946df6b55f721a4e]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-compare.patch"
# content [e97337918fbac7ee2599a05339d560f11b7f06cf]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-compare.patch-z-eq"
# content [b5aee9e3b126fcf68e15f3ca8b40a2bafd131b72]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-dominance.patch"
# content [838ff7b4de2f927203ae8e593951c9593840a451]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-eabi-ieee754-div.patch"
# content [1b90d344245d68f85b4407721b5ddc5c5addd6ed]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-eabi-ieee754.patch"
# content [faa1fb831bd0ddd1da1ebcc43a854de31b4b0689]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-eabi.patch"
# content [7326ebb1d6dd4366b5501b75457a47c42e73d70a]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-floatsi-disable-single.patch"
# content [0d14e006afec5460e34a86845222e6df2003f41f]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-floatsi-disable.patch"
# content [c4708189becc0e5cbf1a051ef328331d63d1040d]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-floatunsidf.patch"
# content [4ca5a2b928e94d63a25afac12fc650e9ec5dc0eb]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-fp_consts.patch"
# content [2eeb17adaf6ba7f92e93b887d038f585d1df071b]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-neg.patch"
# content [314b93b4aaa9726dd8f7d4b32398abcd58d5d38d]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-neg2.patch"
# content [fd342c486b11b3acd2b2ee54cbc39168a748cc0a]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-offset.patch"
# content [93326077ecffecd0beccc63c91cb2b5b8507c65c]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-predicates.patch"
# content [f7d1aab2318253d792612b7948a284512c27dd56]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-predicates2.patch"
# content [5ad7fcb717116c225cd830adfefb4ae3809a6fd2]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-predicates3.patch"
# content [6f793a2455e99388abcc685e02bab489cbf57415]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-saveregs.patch"
# content [c1e8833d7155fd919a3cba104d470e7f424ccd2a]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-scc.patch"
# content [c5df894e22c562557ac25913df8a08d70b1f76d0]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-truncsi-disable-new.patch"
# content [7128d66987169d982ff85640c4254cc077cb9cb5]
#
# add_file "packages/gcc/gcc-4.2.1/arm-crunch-truncsi-disable.patch"
# content [f40077e709b33778f2a117af64f8c0e01d891cf6]
#
# patch "packages/gcc/gcc-cross_4.2.1.bb"
# from [78f5b4b004f93529c71f6ccf6d0c605f7d25daac]
# to [c01b9500bc2acab9b402e91ca8eb66869dc50d8e]
#
# patch "packages/gcc/gcc_4.2.1.bb"
# from [e8dadb13ddc8b7f5a90543b7fc26fd0466b3e1b6]
# to [6e8cf07bbf0b47253a3b63f2c4b0f44b0d66407f]
#
============================================================
--- packages/gcc/gcc-4.2.1/arm-crunch-20000320.patch e97270c4d5ad4cc5b6e9df24a1006a46e117b3c9
+++ packages/gcc/gcc-4.2.1/arm-crunch-20000320.patch e97270c4d5ad4cc5b6e9df24a1006a46e117b3c9
@@ -0,0 +1,11 @@
+--- gcc-4.1.2/gcc/testsuite/gcc.c-torture/execute/ieee/20000320-1.c.original 2007-06-07 16:33:44.000000000 +1000
++++ gcc-4.1.2/gcc/testsuite/gcc.c-torture/execute/ieee/20000320-1.c 2007-06-07 16:34:05.000000000 +1000
+@@ -49,7 +49,7 @@
+ exit (0);
+
+ c(0x3690000000000000ULL, 0x00000000U);
+-#if (defined __arm__ || defined __thumb__) && ! (defined __ARMEB__ || defined __VFP_FP__)
++#if (defined __arm__ || defined __thumb__) && ! (defined __ARMEB__ || defined __VFP_FP__) && ! (defined __MAVERICK__)
+ /* The ARM always stores FP numbers in big-wordian format,
+ even when running in little-byteian mode. */
+ c(0x0000000136900000ULL, 0x00000001U);
============================================================
--- packages/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch f46cf21c24bc42893937104af8d69ec7e0a0de5c
+++ packages/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch f46cf21c24bc42893937104af8d69ec7e0a0de5c
@@ -0,0 +1,85 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -149,7 +149,7 @@
+ (match_operand:SI 1 "cirrus_fp_register" "0")
+ (mult:SI (match_operand:SI 2 "cirrus_fp_register" "v")
+ (match_operand:SI 3 "cirrus_fp_register" "v"))))]
+- "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmsc32%?\\t%V0, %V2, %V3"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -305,7 +305,7 @@
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -315,7 +315,7 @@
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32d%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -339,7 +339,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+@@ -349,7 +349,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+--- gcc-4.1.2/gcc/config/arm/arm.md-trunc 2007-06-15 10:56:13.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:01:22.000000000 +1000
+@@ -3130,7 +3130,7 @@
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+@@ -3142,7 +3142,7 @@
+ (float:DF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsidf2 (operands[0], operands[1]));
+ DONE;
+@@ -3154,7 +3154,7 @@
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], SImode))
+ operands[0] = force_reg (SImode, operands[0]);
+@@ -3170,7 +3170,7 @@
+ (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[1], DFmode))
+ operands[1] = force_reg (DFmode, operands[0]);
============================================================
--- packages/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch 945f41c575544d95b695fd9380bcf6b68635ca14
+++ packages/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch 945f41c575544d95b695fd9380bcf6b68635ca14
@@ -0,0 +1,169 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -34,7 +34,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (plus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfadd64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -74,7 +74,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (minus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsub64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -124,7 +124,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (mult:DI (match_operand:DI 2 "cirrus_fp_register" "v")
+ (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmul64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_dmult")
+ (set_attr "cirrus" "normal")]
+@@ -206,7 +206,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "register_operand" "r")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfrshl64%?\\t%V1, %V0, %s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -215,7 +215,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -224,7 +224,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashiftrt:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #-%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -232,7 +232,7 @@
+ (define_insn "*cirrus_absdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (abs:DI (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfabs64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -238,11 +238,12 @@
+ )
+
+ ;; This doesn't really clobber ``cc''. Fixme: aldyh.
++;; maybe buggy?
+ (define_insn "*cirrus_negdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (neg:DI (match_operand:DI 1 "cirrus_fp_register" "v")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfneg64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -324,14 +324,14 @@
+ (define_insn "floatdisf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64s%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+ (define_insn "floatdidf2"
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64d%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+@@ -376,7 +376,7 @@
+ (define_insn "*cirrus_arm_movdi"
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,o<>,v,r,v,m,v")
+ (match_operand:DI 1 "di_operand" "rIK,mi,r,r,v,mi,v,v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "*
+ {
+ switch (which_alternative)
+--- gcc-4.1.2/gcc/config/arm/arm.md-64 2007-06-15 11:37:42.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:40:45.000000000 +1000
+@@ -357,7 +357,7 @@
+ (clobber (reg:CC CC_REGNUM))])]
+ "TARGET_EITHER"
+ "
+- if (TARGET_HARD_FLOAT && TARGET_MAVERICK)
++ if (TARGET_HARD_FLOAT && TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], DImode))
+ operands[0] = force_reg (DImode, operands[0]);
+@@ -393,7 +393,7 @@
+ (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0")
+ (match_operand:DI 2 "s_register_operand" "r, 0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -421,7 +421,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -450,7 +450,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -838,7 +838,7 @@
+ if (TARGET_HARD_FLOAT && TARGET_MAVERICK
+ && TARGET_ARM
+ && cirrus_fp_register (operands[0], DImode)
+- && cirrus_fp_register (operands[1], DImode))
++ && cirrus_fp_register (operands[1], DImode) && 0)
+ {
+ emit_insn (gen_cirrus_subdi3 (operands[0], operands[1], operands[2]));
+ DONE;
+@@ -2599,7 +2599,7 @@
+ values to iwmmxt regs and back. */
+ FAIL;
+ }
+- else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK))
++ else if (!TARGET_REALLY_IWMMXT)
+ FAIL;
+ "
+ )
+@@ -4215,7 +4215,6 @@
+ [(set (match_operand:DI 0 "nonimmediate_operand" "=l,l,l,l,>,l, m,*r")
+ (match_operand:DI 1 "general_operand" "l, I,J,>,l,mi,l,*r"))]
+ "TARGET_THUMB
+- && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)
+ && ( register_operand (operands[0], DImode)
+ || register_operand (operands[1], DImode))"
+ "*
============================================================
--- packages/gcc/gcc-4.2.1/arm-crunch-64bit-disable0.patch a8060fa9b12c0adea192fd04e26ef15f23153f7b
+++ packages/gcc/gcc-4.2.1%s
>>> DIFF TRUNCATED @ 16K
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