[oe-commits] org.oe.dev uboot: add uboot for gta01 and qt2410
koen commit
openembedded-commits at lists.openembedded.org
Wed Feb 14 16:05:39 UTC 2007
uboot: add uboot for gta01 and qt2410
* BIG FAT NOTE: broken for EABI: http://bugzilla.openmoko.org/cgi-bin/bugzilla/show_bug.cgi?id=180
Author: koen at openembedded.org
Branch: org.openembedded.dev
Revision: b2f951428f9ab2dd072b50acc35127d89849abfe
ViewMTN: http://monotone.openembedded.org/revision.psp?id=b2f951428f9ab2dd072b50acc35127d89849abfe
Files:
1
packages/uboot/files/gta01_nand.h
packages/uboot/files/qt2410.h
packages/uboot/files/qt2410_nand.h
packages/uboot/files/qt2410_ram.h
packages/uboot/files/u-boot-20060807-qt2410.patch
packages/uboot/files/u-boot-20060807.tar.bz2
packages/uboot/files/u-boot-20060907-gta01.patch
packages/uboot/files/u-boot-20060907.tar.bz2
packages/uboot/files/u-boot-20061030-ext2load_hex.patch
packages/uboot/files/u-boot-20061030-gta01bv2.patch
packages/uboot/files/u-boot-20061030-gta01v4.patch
packages/uboot/files/u-boot-20061030-qt2410-gta01.patch
packages/uboot/uboot-gta01_svn.bb
packages/uboot/uboot-qt2410_0.0+cvs20061030.bb
mtn:manual_merge
true
Diffs:
#
# mt diff -r0fd8aee84dc95e1ea0c5b61f73df1cf48f856c81 -rb2f951428f9ab2dd072b50acc35127d89849abfe
#
#
#
# add_file "packages/uboot/files/gta01_nand.h"
# content [ba12ba53df0904d443125fedb164b45f6516fa33]
#
# add_file "packages/uboot/files/qt2410.h"
# content [77ab14ce2bb6a2fcc8bd7a2b11e6a59f6a3e9986]
#
# add_file "packages/uboot/files/qt2410_nand.h"
# content [77ab14ce2bb6a2fcc8bd7a2b11e6a59f6a3e9986]
#
# add_file "packages/uboot/files/qt2410_ram.h"
# content [c0afe08af7139a64050f1d25ce744c1533bce267]
#
# add_file "packages/uboot/files/u-boot-20060807-qt2410.patch"
# content [57439ef835b2925b364abe8cf4a443bd0442bcdf]
#
# add_file "packages/uboot/files/u-boot-20060807.tar.bz2"
# content [23efe1a0ed75bd894c51218229d5bb7077745361]
#
# add_file "packages/uboot/files/u-boot-20060907-gta01.patch"
# content [562557ffa0f048f1fdb39f0942e12bd9b44182b4]
#
# add_file "packages/uboot/files/u-boot-20060907.tar.bz2"
# content [9131e9d6f767298fce9330aee949bb1456b5a28c]
#
# add_file "packages/uboot/files/u-boot-20061030-ext2load_hex.patch"
# content [ea298f41f14daba05cf8e4322d73d334f56c200a]
#
# add_file "packages/uboot/files/u-boot-20061030-gta01bv2.patch"
# content [db81519e4318622016b859fd8a96659d6179d563]
#
# add_file "packages/uboot/files/u-boot-20061030-gta01v4.patch"
# content [bed867f1b86ee04a722b872fb1dc0d94c82fbf9d]
#
# add_file "packages/uboot/files/u-boot-20061030-qt2410-gta01.patch"
# content [6da2cdcb079a4a511c4437715448760031cf3283]
#
# add_file "packages/uboot/uboot-gta01_svn.bb"
# content [536dfb4713adbb62288802a1cfbdc0aecb20c6d8]
#
# add_file "packages/uboot/uboot-qt2410_0.0+cvs20061030.bb"
# content [225ff6c1f7f228ae1e85eea05eedea63c76cd88e]
#
# set "packages/uboot/files/u-boot-20060807.tar.bz2"
# attr "mtn:manual_merge"
# value "true"
#
# set "packages/uboot/files/u-boot-20060907.tar.bz2"
# attr "mtn:manual_merge"
# value "true"
#
============================================================
--- packages/uboot/files/gta01_nand.h ba12ba53df0904d443125fedb164b45f6516fa33
+++ packages/uboot/files/gta01_nand.h ba12ba53df0904d443125fedb164b45f6516fa33
@@ -0,0 +1,233 @@
+/*
+ * (C) Copyright 2006 Harald Welte <hwelte at hmw-consulting.de>
+ *
+ * Configuation settings for the FIC GTA01 Linux GSM phone
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* we want to start u-boot directly from within NAND flash */
+#define CONFIG_S3C2410_NAND_BOOT 1
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
+#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
+#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
+
+/* input clock of PLL */
+#define CONFIG_SYS_CLK_FREQ 12000000/* the GTA01 has 12MHz input clock */
+
+
+#define USE_920T_MMU 1
+#define CONFIG_USE_IRQ 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on GTA01 */
+//#define CONFIG_HWFLOW 1
+
+/************************************************************
+ * RTC
+ ************************************************************/
+#define CONFIG_RTC_S3C24X0 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+#define CONFIG_COMMANDS (\
+ CFG_CMD_BDI | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LAODB | \
+ CFG_CMD_IMI | \
+ CFG_CMD_CACHE | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_ENV | \
+ /* CFG_CMD_IRQ | */ \
+ CFG_CMD_BOOTD | \
+ CFG_CMD_CONSOLE | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_RUN | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_I2C | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_IMMAP | \
+ CFG_CMD_DATE | \
+ CFG_CMD_AUTOSCRIPT | \
+ CFG_CMD_BSP | \
+ CFG_CMD_ELF | \
+ CFG_CMD_MISC | \
+ CFG_CMD_USB | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_DIAG | \
+ /* CFG_CMD_HWFLOW | */ \
+ CFG_CMD_SAVES | \
+ CFG_CMD_NAND | \
+ CFG_CMD_PORTIO | \
+ CFG_CMD_MMC | \
+ CFG_CMD_FAT | \
+ CFG_CMD_EXT2 | \
+ 0)
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTARGS "rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8"
+/*#define CONFIG_BOOTFILE "elinos-lart" */
+#define CONFIG_BOOTCOMMAND "nand load 0x32000000 0x34000 0x200000; bootm 0x32000000"
+
+#define CONFIG_DOS_PARTITION 1
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+/* what's this ? it's not used anywhere */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "GTA01 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
+
+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
+/* it to wrap 100 times (total 1562500) to get 1 sec. */
+#define CFG_HZ 1562500
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+#define CONFIG_USB_OHCI 1
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_RES_SIZE 0x00200000 /* 2 MB for frame buffer */
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+#if 1
+#define CFG_NO_FLASH 1
+#else
+#define CFG_MAX_FLASH_SECT 1
+#define CFG_MAX_FLASH_BANKS 1
+#endif
+
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_SIZE 0x4000 /* 16k Total Size of Environment Sector */
+#define CFG_ENV_OFFSET 0x30000 /* environment after bootloader */
+
+#define NAND_MAX_CHIPS 1
+#define CFG_NAND_BASE 0x4e000000
+#define CFG_MAX_NAND_DEVICE 1
+
+#define CONFIG_MMC 1
+#define CFG_MMC_BASE 0xff000000
+
+/* EXT2 driver */
+#define CONFIG_EXT2 1
+
+/* FAT driver in u-boot is broken currently */
+#define CONFIG_FAT 1
+#define CONFIG_SUPPORT_VFAT 1
+
+/* JFFS2 driver */
+#define CONFIG_JFFS2_NAND 1
+#define CONFIG_JFFS2_NAND_DEV 0
+#define CONFIG_JFFS2_NAND_OFF 0x634000
+#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
+
+/* ATAG configuration */
+#define CONFIG_INITRD_TAG 1
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_CMDLINE_TAG 1
+#if 0
+#define CONFIG_SERIAL_TAG 1
+#define CONFIG_REVISION_TAG 1
+#endif
+
+#define CONFIG_DRIVER_S3C24X0_I2C 1
+#define CONFIG_HARD_I2C 1
+#define CFG_I2C_SPEED 400000 /* 400kHz according to PCF50707 data sheet */
+#define CFG_I2C_SLAVE 0x7f
+
+
+#if 0
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_S3C2410
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+
+#define VIDEO_KBD_INIT_FCT 0
+#define VIDEO_TSTC_FCT serial_tstc
+#define VIDEO_GETC_FCT serial_getc
+
+#define LCD_VIDEO_ADDR 0x33d00000
+#endif
+
+#endif /* __CONFIG_H */
============================================================
--- packages/uboot/files/qt2410.h 77ab14ce2bb6a2fcc8bd7a2b11e6a59f6a3e9986
+++ packages/uboot/files/qt2410.h 77ab14ce2bb6a2fcc8bd7a2b11e6a59f6a3e9986
@@ -0,0 +1,256 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger at sysgo.de>
+ * Gary Jennejohn <gj at denx.de>
+ * David Mueller <d.mueller at elsoft.ch>
+ *
+ * Configuation settings for the SAMSUNG SMDK2410 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#if 0
+/* If we want to start u-boot from usb bootloader in NOR flash */
+#define CONFIG_SKIP_RELOCATE_UBOOT 1
+#define CONFIG_SKIP_LOWLEVEL_INIT 1
+#else
+/* If we want to start u-boot directly from within NAND flash */
+#define CONFIG_S3C2410_NAND_BOOT 1
+#endif
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
+#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
+#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
+
+/* input clock of PLL */
+#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */
+
+
+#define USE_920T_MMU 1
+#define CONFIG_USE_IRQ 1
+//#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
+#define CS8900_BASE 0x19000300
+#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_HWFLOW 1
+
+/************************************************************
+ * RTC
+ ************************************************************/
+#define CONFIG_RTC_S3C24X0 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+#define CONFIG_COMMANDS \
+ (CONFIG_CMD_DFL | \
+ CFG_CMD_BSP | \
+ CFG_CMD_CACHE | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_DIAG | \
+ CFG_CMD_ELF | \
+ CFG_CMD_EXT2 | \
+ CFG_CMD_FAT | \
+ CFG_CMD_HWFLOW | \
+ /* CFG_CMD_IDE | */ \
+ /* CFG_CMD_IRQ | */ \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_MMC | \
+ CFG_CMD_NAND | \
+ CFG_CMD_PING | \
+ CFG_CMD_PORTIO | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_SAVES | \
+ CFG_CMD_USB)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTARGS "root=/dev/sda1 console=ttySAC0,115200 loglevel=8 rootdelay=10"
+/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b */
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 10.0.0.110
+#define CONFIG_SERVERIP 10.0.0.1
+/*#define CONFIG_BOOTFILE "elinos-lart" */
+#define CONFIG_BOOTCOMMAND "mmcinit; ext2load mmc 0 0x32000000 uImage; bootm 0x32000000"
+
+#define CONFIG_DOS_PARTITION 1
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+/* what's this ? it's not used anywhere */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "QT2410 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
+
+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
+/* it to wrap 100 times (total 1562500) to get 1 sec. */
+#define CFG_HZ 1562500
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/* IDE/ATA config */
+
+#if 0
+#define CFG_IDE_MAXBUS 1
+#define CFG_IDE_MAXDEVICE 2
+#define CFG_IDE_PREINIT 0
+
+#define CFG_ATA_BASE_ADDR
+#endif
+
+#define CONFIG_USB_OHCI 1
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_RES_SIZE 0x00200000 /* 2 MB for frame buffer */
+
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
+#if 0
+#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
+#endif
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#ifdef CONFIG_AMD_LV800
+#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
+#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
+#endif
+#ifdef CONFIG_AMD_LV400
+#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
+#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
+#endif
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
+
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_SIZE 0x4000 /* 16k Total Size of Environment Sector */
+#define CFG_ENV_OFFSET 0x30000 /* environment after bootloader */
+
+#define NAND_MAX_CHIPS 1
+#define CFG_NAND_BAS%s
>>> DIFF TRUNCATED @ 16K
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