[oe-commits] org.oe.dev packages/uboot/u-boot_1.1.6.bb : Add support for the MPC8323e-rdb board
ifaistos commit
openembedded-commits at lists.openembedded.org
Mon Nov 5 19:41:22 UTC 2007
packages/uboot/u-boot_1.1.6.bb : Add support for the MPC8323e-rdb board
Author: ifaistos at openembedded.org
Branch: org.openembedded.dev
Revision: 18a5291cc120953abd62721e34fe771834373b2a
ViewMTN: http://monotone.openembedded.org/revision/info/18a5291cc120953abd62721e34fe771834373b2a
Files:
1
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-83xx-optimizations.patch
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Add-support-for-the-MPC832XEMDS-board.patch
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Add-the-MPC832XEMDS-board-readme.patch
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Added-MPC8323E-RDB-board-support-2.patch
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Fix-the-UEC-driver-bug-of-QE.patch
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-UEC-remove-udelay.patch
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-mpc83xx-20061206.patch
packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-streamline-the-83xx-immr-head-file.patch
packages/uboot/u-boot_1.1.6.bb
Diffs:
#
# mt diff -r4bd5cfa43f82deb86b0af394c1130856e004de87 -r18a5291cc120953abd62721e34fe771834373b2a
#
#
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-83xx-optimizations.patch"
# content [5ca479758210a5bfca8eb03abaa6b85c52ee327f]
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Add-support-for-the-MPC832XEMDS-board.patch"
# content [3117c33918f196cb34fdb5b4a336c998d6b86b60]
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Add-the-MPC832XEMDS-board-readme.patch"
# content [e8a7842f5d966b712015dc4eaa23994b12761f4f]
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Added-MPC8323E-RDB-board-support-2.patch"
# content [a6d0e1847982e678ea63425108be46c5f6625406]
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Fix-the-UEC-driver-bug-of-QE.patch"
# content [be882bde8234246bab1e87e2b600673ada71b96d]
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-UEC-remove-udelay.patch"
# content [bf261333976755264d4b7cbaa09da8aac032bf5c]
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-mpc83xx-20061206.patch"
# content [cdbdec237d2df9151ccbe7610579b760f28dc49c]
#
# add_file "packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-streamline-the-83xx-immr-head-file.patch"
# content [7af81a149a7b9891a3bf01027a7e7ccd18b6d332]
#
# patch "packages/uboot/u-boot_1.1.6.bb"
# from [2c312681345e37f99ff59ba0f3b883c44dd4f35c]
# to [6508f83f52500b8398171e7a57230191ad0f1588]
#
============================================================
--- packages/uboot/u-boot-1.1.6/u-boot-1.1.6-83xx-optimizations.patch 5ca479758210a5bfca8eb03abaa6b85c52ee327f
+++ packages/uboot/u-boot-1.1.6/u-boot-1.1.6-83xx-optimizations.patch 5ca479758210a5bfca8eb03abaa6b85c52ee327f
@@ -0,0 +1,89 @@
+diff --exclude CVS -uNr u-boot-1.1.6/cpu/mpc83xx/cpu_init.c u-boot-1.1.6.modified/cpu/mpc83xx/cpu_init.c
+--- u-boot-1.1.6/cpu/mpc83xx/cpu_init.c 2007-04-10 17:43:16.000000000 -0400
++++ u-boot-1.1.6.modified/cpu/mpc83xx/cpu_init.c 2007-04-10 17:31:51.000000000 -0400
+@@ -66,10 +66,30 @@
+ memset ((void *) gd, 0, sizeof (gd_t));
+
+ /* system performance tweaking */
++ /* System Priority Configuration Register (SPCR) */
++#ifdef CFG_SPCR_PCIHPE
++ /* PCI highest priority enable */
++ im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_PCIHPE) | (CFG_SPCR_PCIHPE << SPCR_PCIHPE_SHIFT);
++#endif
+
+-#ifdef CFG_ACR_PIPE_DEP
+- /* Arbiter pipeline depth */
+- im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | (3 << ACR_PIPE_DEP_SHIFT);
++#ifdef CFG_SPCR_PCIPR
++ /* PCI bridge CSB request priority */
++ im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_PCIPR) | (CFG_SPCR_PCIPR << SPCR_PCIPR_SHIFT);
++#endif
++
++#ifdef CFG_SPCR_OPT
++ /* Optimize transactions between CSB and other devices */
++ im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) | (CFG_SPCR_OPT << SPCR_OPT_SHIFT);
++#endif
++
++#ifdef CFG_SPCR_TBEN
++ /* e300 time base unit enable */
++ im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TBEN) | (CFG_SPCR_TBEN << SPCR_TBEN_SHIFT);
++#endif
++
++#ifdef CFG_SPCR_COREPR
++ /* e300 core CSB request priority */
++ im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_COREPR) | (CFG_SPCR_COREPR << SPCR_COREPR_SHIFT);
+ #endif
+
+ #ifdef CFG_SPCR_TSEC1EP
+@@ -82,6 +102,7 @@
+ im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSEC2EP) | (3 << SPCR_TSEC2EP_SHIFT);
+ #endif
+
++ /* System Clock Control Register (SCCR) */
+ #ifdef CFG_SCCR_TSEC1CM
+ /* TSEC1 clock mode */
+ im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC1CM) | (1 << SCCR_TSEC1CM_SHIFT);
+@@ -91,6 +112,12 @@
+ im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC2CM) | (1 << SCCR_TSEC2CM_SHIFT);
+ #endif
+
++ /* Arbiter Control Register (ACR) */
++#ifdef CFG_ACR_PIPE_DEP
++ /* Arbiter pipeline depth */
++ im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | (3 << ACR_PIPE_DEP_SHIFT);
++#endif
++
+ #ifdef CFG_ACR_RPTCNT
+ /* Arbiter repeat count */
+ im->arbiter.acr = ((im->arbiter.acr & ~(ACR_RPTCNT)) | (3 << ACR_RPTCNT_SHIFT));
+diff --exclude CVS -uNr u-boot-1.1.6/include/configs/MPC8323ERDB.h u-boot-1.1.6.modified/include/configs/MPC8323ERDB.h
+--- u-boot-1.1.6/include/configs/MPC8323ERDB.h 2007-04-10 17:43:16.000000000 -0400
++++ u-boot-1.1.6.modified/include/configs/MPC8323ERDB.h 2007-04-10 17:32:03.000000000 -0400
+@@ -63,6 +63,16 @@
+ HRCWH_BIG_ENDIAN |\
+ HRCWH_LALE_NORMAL)
+
++/* System performance */
++#define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
++#define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
++#define CFG_SPCR_PCIHPE 0 /* (0-1) PCI highest priority enable */
++#define CFG_SPCR_PCIPR 0 /* (0-3) PCI bridge CSB request priority */
++#define CFG_SPCR_OPT 1 /* (0-1) Optimize transactions between CSB and the SEC and QUICC Engine block */
++#define CFG_SPCR_TBEN 1 /* (0-1) e300 time base unit enable */
++#define CFG_SPCR_COREPR 0 /* (0-3) e300 core CSB request priority */
++
++
+ /*
+ * System IO Config
+ */
+diff --exclude CVS -uNr u-boot-1.1.6/include/mpc83xx.h u-boot-1.1.6.modified/include/mpc83xx.h
+--- u-boot-1.1.6/include/mpc83xx.h 2007-04-10 17:43:16.000000000 -0400
++++ u-boot-1.1.6.modified/include/mpc83xx.h 2007-04-10 17:32:15.000000000 -0400
+@@ -91,6 +91,7 @@
+ #define SPCR_PCIPR 0x03000000 /* PCI bridge system bus request priority */
+ #define SPCR_PCIPR_SHIFT (31-7)
+ #define SPCR_OPT 0x00800000 /* Optimize */
++#define SPCR_OPT_SHIFT (31-8)
+ #define SPCR_TBEN 0x00400000 /* E300 PowerPC core time base unit enable */
+ #define SPCR_TBEN_SHIFT (31-9)
+ #define SPCR_COREPR 0x00300000 /* E300 PowerPC Core system bus request priority */
============================================================
--- packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Add-support-for-the-MPC832XEMDS-board.patch 3117c33918f196cb34fdb5b4a336c998d6b86b60
+++ packages/uboot/u-boot-1.1.6/u-boot-1.1.6-fsl-1-Add-support-for-the-MPC832XEMDS-board.patch 3117c33918f196cb34fdb5b4a336c998d6b86b60
@@ -0,0 +1,1809 @@
+fe298a1bbd7b9526ca1139da8977e1a076c4e176
+diff --git a/Makefile b/Makefile
+index d2534ab..d172411 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1621,6 +1621,30 @@ MPC8360EMDS_SLAVE_config: unconfig
+ MPC8349ITX_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349itx
+
++MPC832XEMDS_config \
++MPC832XEMDS_HOST_33_config \
++MPC832XEMDS_HOST_66_config \
++MPC832XEMDS_SLAVE_config: unconfig
++ @echo "" >include/config.h ; \
++ if [ "$(findstring _HOST_,$@)" ] ; then \
++ echo -n "... PCI HOST " ; \
++ echo "#define CONFIG_PCI" >>include/config.h ; \
++ fi ; \
++ if [ "$(findstring _SLAVE_,$@)" ] ; then \
++ echo "...PCI SLAVE 66M" ; \
++ echo "#define CONFIG_PCI" >>include/config.h ; \
++ echo "#define CONFIG_PCISLAVE" >>include/config.h ; \
++ fi ; \
++ if [ "$(findstring _33_,$@)" ] ; then \
++ echo -n "...33M ..." ; \
++ echo "#define PCI_33M" >>include/config.h ; \
++ fi ; \
++ if [ "$(findstring _66_,$@)" ] ; then \
++ echo -n "...66M..." ; \
++ echo "#define PCI_66M" >>include/config.h ; \
++ fi ;
++ @$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds
++
+ #########################################################################
+ ## MPC85xx Systems
+ #########################################################################
+diff --git a/board/mpc832xemds/Makefile b/board/mpc832xemds/Makefile
+new file mode 100644
+index 0000000..5ec7a87
+--- /dev/null
++++ b/board/mpc832xemds/Makefile
+@@ -0,0 +1,50 @@
++#
++# (C) Copyright 2006
++# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS := $(BOARD).o pci.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak .depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff --git a/board/mpc832xemds/config.mk b/board/mpc832xemds/config.mk
+new file mode 100644
+index 0000000..6c3eca7
+--- /dev/null
++++ b/board/mpc832xemds/config.mk
+@@ -0,0 +1,28 @@
++#
++# (C) Copyright 2006
++# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++#
++# MPC832XEMDS
++#
++
++TEXT_BASE = 0xFE000000
+diff --git a/board/mpc832xemds/mpc832xemds.c b/board/mpc832xemds/mpc832xemds.c
+new file mode 100644
+index 0000000..772da67
+--- /dev/null
++++ b/board/mpc832xemds/mpc832xemds.c
+@@ -0,0 +1,176 @@
++/*
++ * Copyright (C) 2006 Freescale Semiconductor, Inc.
++ *
++ * Dave Liu <daveliu at freescale.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ */
++
++#include <common.h>
++#include <ioports.h>
++#include <mpc83xx.h>
++#include <i2c.h>
++#include <spd.h>
++#include <miiphy.h>
++#include <command.h>
++#if defined(CONFIG_PCI)
++#include <pci.h>
++#endif
++#if defined(CONFIG_SPD_EEPROM)
++#include <spd_sdram.h>
++#else
++#include <asm/mmu.h>
++#endif
++#if defined(CONFIG_OF_FLAT_TREE)
++#include <ft_build.h>
++#endif
++
++const qe_iop_conf_t qe_iop_conf_tab[] = {
++ /* ETH3 */
++ {1, 0, 1, 0, 1}, /* TxD0 */
++ {1, 1, 1, 0, 1}, /* TxD1 */
++ {1, 2, 1, 0, 1}, /* TxD2 */
++ {1, 3, 1, 0, 1}, /* TxD3 */
++ {1, 9, 1, 0, 1}, /* TxER */
++ {1, 12, 1, 0, 1}, /* TxEN */
++ {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */
++
++ {1, 4, 2, 0, 1}, /* RxD0 */
++ {1, 5, 2, 0, 1}, /* RxD1 */
++ {1, 6, 2, 0, 1}, /* RxD2 */
++ {1, 7, 2, 0, 1}, /* RxD3 */
++ {1, 8, 2, 0, 1}, /* RxER */
++ {1, 10, 2, 0, 1}, /* RxDV */
++ {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */
++ {1, 11, 2, 0, 1}, /* COL */
++ {1, 13, 2, 0, 1}, /* CRS */
++
++ /* ETH4 */
++ {1, 18, 1, 0, 1}, /* TxD0 */
++ {1, 19, 1, 0, 1}, /* TxD1 */
++ {1, 20, 1, 0, 1}, /* TxD2 */
++ {1, 21, 1, 0, 1}, /* TxD3 */
++ {1, 27, 1, 0, 1}, /* TxER */
++ {1, 30, 1, 0, 1}, /* TxEN */
++ {3, 6, 2, 0, 1}, /* TxCLK->CLK8 */
++
++ {1, 22, 2, 0, 1}, /* RxD0 */
++ {1, 23, 2, 0, 1}, /* RxD1 */
++ {1, 24, 2, 0, 1}, /* RxD2 */
++ {1, 25, 2, 0, 1}, /* RxD3 */
++ {1, 26, 1, 0, 1}, /* RxER */
++ {1, 28, 2, 0, 1}, /* Rx_DV */
++ {3, 31, 2, 0, 1}, /* RxCLK->CLK7 */
++ {1, 29, 2, 0, 1}, /* COL */
++ {1, 31, 2, 0, 1}, /* CRS */
++
++ {3, 4, 3, 0, 2}, /* MDIO */
++ {3, 5, 1, 0, 2}, /* MDC */
++
++ {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
++};
++
++int board_early_init_f(void)
++{
++ volatile u8 *bcsr = (volatile u8 *)CFG_BCSR;
++
++ /* Enable flash write */
++ bcsr[9] &= ~0x08;
++
++ return 0;
++}
++
++int fixed_sdram(void);
++
++long int initdram(int board_type)
++{
++ volatile immap_t *im = (immap_t *) CFG_IMMR;
++ u32 msize = 0;
++
++ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
++ return -1;
++
++ /* DDR SDRAM - Main SODIMM */
++ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
++
++ msize = fixed_sdram();
++
++ puts("\n DDR RAM: ");
++
++ /* return total bus SDRAM size(bytes) -- DDR */
++ return (msize * 1024 * 1024);
++}
++
++/*************************************************************************
++ * fixed sdram init -- doesn't use serial presence detect.
++ ************************************************************************/
++int fixed_sdram(void)
++{
++ volatile immap_t *im = (immap_t *) CFG_IMMR;
++ u32 msize = 0;
++ u32 ddr_size;
++ u32 ddr_size_log2;
++
++ msize = CFG_DDR_SIZE;
++ for (ddr_size = msize << 20, ddr_size_log2 = 0;
++ (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
++ if (ddr_size & 1) {
++ return -1;
++ }
++ }
++ im->sysconf.ddrlaw[0].ar =
++ LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
++#if (CFG_DDR_SIZE != 128)
++#warning Currenly any ddr size other than 128 is not supported
++#endif
++ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
++ im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
++ im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
++ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
++ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
++ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
++ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
++ im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
++ im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
++ im->ddr.sdram_mode = CFG_DDR_MODE;
++ im->ddr.sdram_mode2 = CFG_DDR_MODE2;
++ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
++ __asm__ __volatile__ ("sync");
++ udelay(200);
++
++ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
++ __asm__ __volatile__ ("sync");
++ return msize;
++}
++
++int checkboard(void)
++{
++ puts("Board: Freescale MPC832XEMDS\n");
++ return 0;
++}
++
++#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
++void
++ft_board_setup(void *blob, bd_t *bd)
++{
++ u32 *p;
++ int len;
++
++#ifdef CONFIG_PCI
++ ft_pci_setup(blob, bd);
++#endif
++ ft_cpu_setup(blob, bd);
++
++ p = ft_get_prop(blob, "/memory/reg", &len);
++ if (p != NULL) {
++ *p++ = cpu_to_be32(bd->bi_memstart);
++ *p = cpu_to_be32(bd->bi_memsize);
++ }
++}
++#endif
+diff --git a/board/mpc832xemds/pci.c b/board/mpc832xemds/pci.c
+new file mode 100644
+index 0000000..09f3ac3
+--- /dev/null
++++ b/board/mpc832xemds/pci.c
+@@ -0,0 +1,313 @@
++/*
++ * Copyright (C) 2006 Freescale Semiconductor, Inc.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ */
++
++/*
++ * PCI Configuration space access support for MPC83xx PCI Bridge
++ */
++#include <asm/mmu.h>
++#include <asm/io.h>
++#include <common.h>
++#include <pci.h>
++#include <i2c.h>
++
++#include <asm/fsl_i2c.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++#if defined(CONFIG_PCI)
++#define PCI_FUNCTION_CONFIG 0x44
++#define PCI_FUNCTION_CFG_LOCK 0x20
++
++/*
++ * Initialize PCI Devices, report devices found
++ */
++#ifndef CONFIG_PCI_PNP
++static struct pci_config_table pci_mpc83xxemds_config_table[] = {
++ {
++ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
++ pci_cfgfunc_config_device,
++ {PCI_ENET0_IOADDR,
++ PCI_ENET0_MEMADDR,
++ PCI_COMMON_MEMORY | PCI_COMMAND_MASTER}
++ },
++ {}
++}
++#endif
++static struct pci_controller hose[] = {
++ {
++#ifndef CONFIG_PCI_PNP
++ config_table:pci_mpc83xxemds_config_table,
++#endif
++ },
++};
++
++/**********************************************************************
++ * pci_init_board()
++ *********************************************************************/
++void pci_init_boar%s
>>> DIFF TRUNCATED @ 16K
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