[oe-commits] org.oe.dev merge of 'adb71bd42c308e5f50a18441883b2051173f9cd2'
mickeyl commit
oe at amethyst.openembedded.net
Fri Jun 13 07:05:53 UTC 2008
merge of 'adb71bd42c308e5f50a18441883b2051173f9cd2'
and 'd9f9c0225f99c1f7688e60a3a0c39a308c5fc36f'
Author: mickeyl at openembedded.org
Branch: org.openembedded.dev
Revision: c5b62589bb3b1863d12fd6f97a2760a1acafd169
ViewMTN: http://monotone.openembedded.org/revision/info/c5b62589bb3b1863d12fd6f97a2760a1acafd169
Files:
1
packages/linux/linux-omap2-git/beagleboard/00001-mcbsp-transform.patch
packages/linux/linux-omap2-git/beagleboard/00002-mcbsp-omap1.patch
packages/linux/linux-omap2-git/beagleboard/00003-mcbsp-omap3-clock.patch
packages/linux/linux-omap2-git/beagleboard/00004-omap2-mcbsp.patch
packages/linux/linux-omap2-git/beagleboard/mcbsp-fix-include.patch
packages/linux/linux-omap2-git/beagleboard/mux.patch
packages/linux/linux-omap2-git/omap3evm
conf/machine/omap3evm.conf
packages/linux/linux-omap2-git/omap3evm/0001-ARM-OMAP-SmartReflex-driver.patch
packages/linux/linux-omap2-git/omap3evm/0001-ASoC-OMAP-Add-basic-support-for-OMAP34xx-in-McBSP.patch
packages/linux/linux-omap2-git/omap3evm/0001-omap3-cpuidle.patch
packages/linux/linux-omap2-git/omap3evm/0001-omap3beagle-add-a-platform-device-to-hook-up-the-GP.patch
packages/linux/linux-omap2-git/omap3evm/0002-ARM-OMAP-SmartReflex-driver.patch
packages/linux/linux-omap2-git/omap3evm/0002-omap3-cpuidle.patch
packages/linux/linux-omap2-git/omap3evm/0003-ARM-OMAP-SmartReflex-driver.patch
packages/linux/linux-omap2-git/omap3evm/defconfig
packages/linux/linux-omap2-git/omap3evm/flash.patch
conf/distro/angstrom-2008.1.conf
packages/linux/linux-omap2_git.bb
packages/freetype/freetype-2.3.6
packages/freetype/freetype-2.3.6/fix-configure.patch
packages/python/python-gst/import-gobject-instead-of-pygtk.patch
packages/freetype/freetype_2.3.6.bb
packages/python/python-gst_0.10.10.bb
Diffs:
#
# mt diff -radb71bd42c308e5f50a18441883b2051173f9cd2 -rc5b62589bb3b1863d12fd6f97a2760a1acafd169
#
#
#
# delete "packages/linux/linux-omap2-git/beagleboard/00001-mcbsp-transform.patch"
#
# delete "packages/linux/linux-omap2-git/beagleboard/00002-mcbsp-omap1.patch"
#
# delete "packages/linux/linux-omap2-git/beagleboard/00003-mcbsp-omap3-clock.patch"
#
# delete "packages/linux/linux-omap2-git/beagleboard/00004-omap2-mcbsp.patch"
#
# delete "packages/linux/linux-omap2-git/beagleboard/mcbsp-fix-include.patch"
#
# delete "packages/linux/linux-omap2-git/beagleboard/mux.patch"
#
# add_dir "packages/linux/linux-omap2-git/omap3evm"
#
# add_file "conf/machine/omap3evm.conf"
# content [29a033515664d24c537e38e7286fa39e69c1cd75]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/0001-ARM-OMAP-SmartReflex-driver.patch"
# content [fdda575beee404a37729afed2c1003d7e5323a71]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/0001-ASoC-OMAP-Add-basic-support-for-OMAP34xx-in-McBSP.patch"
# content [c8f4b8935cd2abedc7760cf9594494dc4faa445c]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/0001-omap3-cpuidle.patch"
# content [91c3d0a6224a49772f836023095df61194e6ca80]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/0001-omap3beagle-add-a-platform-device-to-hook-up-the-GP.patch"
# content [b0b565d62f76114d9eb4ce37fc8e191699e6024c]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/0002-ARM-OMAP-SmartReflex-driver.patch"
# content [60a4cfc3baeb42717cd3d587170266fde55853f5]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/0002-omap3-cpuidle.patch"
# content [b6a63ccfb40c5bcb4f97d87a16af46efd3f441e0]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/0003-ARM-OMAP-SmartReflex-driver.patch"
# content [c217e7265da8f9240d101a9d29fde6d43fa4435e]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/defconfig"
# content [f47bbb6cd4b40524fe13d11da2f0ec4179f502bc]
#
# add_file "packages/linux/linux-omap2-git/omap3evm/flash.patch"
# content [178d61ff76fbe7fffe3974d659d677439e070225]
#
# patch "conf/distro/angstrom-2008.1.conf"
# from [28e20cea772d6c675f1fb788b006a1ab4a5959a9]
# to [c8851b3ee0837d56ce5ebc197ec9aa3505fb7f91]
#
# patch "packages/linux/linux-omap2_git.bb"
# from [5daa8c4a710b98290d1612cd8fa01d1d8f77c903]
# to [728a83a1d213657ee125565b0bd34a9006bcca11]
#
============================================================
--- conf/machine/omap3evm.conf 29a033515664d24c537e38e7286fa39e69c1cd75
+++ conf/machine/omap3evm.conf 29a033515664d24c537e38e7286fa39e69c1cd75
@@ -0,0 +1,32 @@
+#@TYPE: Machine
+#@NAME: omap3 EVM
+#@DESCRIPTION: Machine configuration for the TI omap3 EVM
+TARGET_ARCH = "arm"
+PACKAGE_EXTRA_ARCHS = "armv4 armv4t armv5te armv6 armv7 armv7a"
+
+PREFERRED_PROVIDER_virtual/xserver = "xserver-kdrive"
+XSERVER = "xserver-kdrive-fbdev"
+GUI_MACHINE_CLASS = "smallscreen"
+
+include conf/machine/include/tune-arm1136jf-s.inc
+# requires gcc 4.3.0:
+#include conf/machine/include/tune-cortexa8.inc
+
+# Ship all kernel modules
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+
+IMAGE_FSTYPES ?= "jffs2 tar.bz2"
+EXTRA_IMAGECMD_jffs2 = "-lqnp "
+
+SERIAL_CONSOLE = "115200 ttyS0"
+
+PREFERRED_PROVIDER_virtual/kernel = "linux-omap2"
+
+KERNEL_IMAGETYPE = "uImage"
+
+UBOOT_ENTRYPOINT = "0x80008000"
+UBOOT_LOADADDRESS = "0x80008000"
+UBOOT_ARCH = "arm"
+
+MACHINE_FEATURES = "kernel26 apm usbgadget usbhost vfat ext2 screen touchscreen"
+
============================================================
--- packages/linux/linux-omap2-git/omap3evm/0001-ARM-OMAP-SmartReflex-driver.patch fdda575beee404a37729afed2c1003d7e5323a71
+++ packages/linux/linux-omap2-git/omap3evm/0001-ARM-OMAP-SmartReflex-driver.patch fdda575beee404a37729afed2c1003d7e5323a71
@@ -0,0 +1,1002 @@
+From: Kalle Jokiniemi <ext-kalle.jokiniemi at nokia.com>
+To: linux-omap at vger.kernel.org
+Cc: Kalle Jokiniemi <ext-kalle.jokiniemi at nokia.com>
+Subject: [PATCH 1/3] ARM: OMAP: SmartReflex driver, reference source and header files
+Date: Mon, 2 Jun 2008 14:30:12 +0300
+
+The following patch set integrates TI's SmartReflex driver. SmartReflex is a
+module that adjusts OMAP3 VDD1 and VDD2 operating voltages around the nominal
+values of current operating point depending on silicon characteristics and
+operating conditions.
+
+The driver creates two sysfs entries into /sys/power/ named "sr_vdd1_autocomp"
+and "sr_vdd2_autocomp" which can be used to activate SmartReflex modules 1 and
+2.
+
+Use the following commands to enable SmartReflex:
+
+echo -n 1 > /sys/power/sr_vdd1_autocomp
+echo -n 1 > /sys/power/sr_vdd2_autocomp
+
+To disable:
+
+echo -n 0 > /sys/power/sr_vdd1_autocomp
+echo -n 0 > /sys/power/sr_vdd2_autocomp
+
+This particular patch adds the TI reference source and header files for
+SmartReflex. Only modifications include minor styling to pass checkpatch.pl
+test.
+
+Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi at nokia.com>
+---
+ arch/arm/mach-omap2/smartreflex.c | 815 +++++++++++++++++++++++++++++++++++++
+ arch/arm/mach-omap2/smartreflex.h | 136 ++++++
+ 2 files changed, 951 insertions(+), 0 deletions(-)
+ create mode 100644 arch/arm/mach-omap2/smartreflex.c
+ create mode 100644 arch/arm/mach-omap2/smartreflex.h
+
+diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
+new file mode 100644
+index 0000000..dae7460
+--- /dev/null
++++ b/arch/arm/mach-omap2/smartreflex.c
+@@ -0,0 +1,815 @@
++/*
++ * linux/arch/arm/mach-omap3/smartreflex.c
++ *
++ * OMAP34XX SmartReflex Voltage Control
++ *
++ * Copyright (C) 2007 Texas Instruments, Inc.
++ * Lesly A M <x0080970 at ti.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/sysfs.h>
++
++#include <asm/arch/prcm.h>
++#include <asm/arch/power_companion.h>
++#include <linux/io.h>
++
++#include "prcm-regs.h"
++#include "smartreflex.h"
++
++
++/* #define DEBUG_SR 1 */
++#ifdef DEBUG_SR
++# define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__ ,\
++ ## args)
++#else
++# define DPRINTK(fmt, args...)
++#endif
++
++struct omap_sr{
++ int srid;
++ int is_sr_reset;
++ int is_autocomp_active;
++ struct clk *fck;
++ u32 req_opp_no;
++ u32 opp1_nvalue, opp2_nvalue, opp3_nvalue, opp4_nvalue, opp5_nvalue;
++ u32 senp_mod, senn_mod;
++ u32 srbase_addr;
++ u32 vpbase_addr;
++};
++
++static struct omap_sr sr1 = {
++ .srid = SR1,
++ .is_sr_reset = 1,
++ .is_autocomp_active = 0,
++ .srbase_addr = OMAP34XX_SR1_BASE,
++};
++
++static struct omap_sr sr2 = {
++ .srid = SR2,
++ .is_sr_reset = 1,
++ .is_autocomp_active = 0,
++ .srbase_addr = OMAP34XX_SR2_BASE,
++};
++
++static inline void sr_write_reg(struct omap_sr *sr, int offset, u32 value)
++{
++ omap_writel(value, sr->srbase_addr + offset);
++}
++
++static inline void sr_modify_reg(struct omap_sr *sr, int offset, u32 mask,
++ u32 value)
++{
++ u32 reg_val;
++
++ reg_val = omap_readl(sr->srbase_addr + offset);
++ reg_val &= ~mask;
++ reg_val |= value;
++
++ omap_writel(reg_val, sr->srbase_addr + offset);
++}
++
++static inline u32 sr_read_reg(struct omap_sr *sr, int offset)
++{
++ return omap_readl(sr->srbase_addr + offset);
++}
++
++
++#ifndef USE_EFUSE_VALUES
++static void cal_reciprocal(u32 sensor, u32 *sengain, u32 *rnsen)
++{
++ u32 gn, rn, mul;
++
++ for (gn = 0; gn < GAIN_MAXLIMIT; gn++) {
++ mul = 1 << (gn + 8);
++ rn = mul / sensor;
++ if (rn < R_MAXLIMIT) {
++ *sengain = gn;
++ *rnsen = rn;
++ }
++ }
++}
++#endif
++
++static int sr_clk_enable(struct omap_sr *sr)
++{
++ if (clk_enable(sr->fck) != 0) {
++ printk(KERN_ERR "Could not enable sr%d_fck\n", sr->srid);
++ goto clk_enable_err;
++ }
++
++ /* set fclk- active , iclk- idle */
++ sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
++ SR_CLKACTIVITY_IOFF_FON);
++
++ return 0;
++
++clk_enable_err:
++ return -1;
++}
++
++static int sr_clk_disable(struct omap_sr *sr)
++{
++ /* set fclk, iclk- idle */
++ sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
++ SR_CLKACTIVITY_IOFF_FOFF);
++
++ clk_disable(sr->fck);
++ sr->is_sr_reset = 1;
++
++ return 0;
++}
++
++static void sr_set_nvalues(struct omap_sr *sr)
++{
++#ifdef USE_EFUSE_VALUES
++ u32 n1, n2;
++#else
++ u32 senpval, sennval;
++ u32 senpgain, senngain;
++ u32 rnsenp, rnsenn;
++#endif
++
++ if (sr->srid == SR1) {
++#ifdef USE_EFUSE_VALUES
++ /* Read values for VDD1 from EFUSE */
++#else
++ /* since E-Fuse Values are not available, calculating the
++ * reciprocal of the SenN and SenP values for SR1
++ */
++ sr->senp_mod = 0x03; /* SenN-M5 enabled */
++ sr->senn_mod = 0x03;
++
++ /* for OPP5 */
++ senpval = 0x848 + 0x330;
++ sennval = 0xacd + 0x330;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp5_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++ /* for OPP4 */
++ senpval = 0x727 + 0x2a0;
++ sennval = 0x964 + 0x2a0;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp4_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++ /* for OPP3 */
++ senpval = 0x655 + 0x200;
++ sennval = 0x85b + 0x200;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp3_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++ /* for OPP2 */
++ senpval = 0x3be + 0x1a0;
++ sennval = 0x506 + 0x1a0;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp2_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++ /* for OPP1 */
++ senpval = 0x28c + 0x100;
++ sennval = 0x373 + 0x100;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp1_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++ sr_clk_enable(sr);
++ sr_write_reg(sr, NVALUERECIPROCAL, sr->opp3_nvalue);
++ sr_clk_disable(sr);
++
++#endif
++ } else if (sr->srid == SR2) {
++#ifdef USE_EFUSE_VALUES
++ /* Read values for VDD2 from EFUSE */
++#else
++ /* since E-Fuse Values are not available, calculating the
++ * reciprocal of the SenN and SenP values for SR2
++ */
++ sr->senp_mod = 0x03;
++ sr->senn_mod = 0x03;
++
++ /* for OPP3 */
++ senpval = 0x579 + 0x200;
++ sennval = 0x76f + 0x200;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp3_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++ /* for OPP2 */
++ senpval = 0x390 + 0x1c0;
++ sennval = 0x4f5 + 0x1c0;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp2_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++ /* for OPP1 */
++ senpval = 0x25d;
++ sennval = 0x359;
++
++ cal_reciprocal(senpval, &senpgain, &rnsenp);
++ cal_reciprocal(sennval, &senngain, &rnsenn);
++
++ sr->opp1_nvalue =
++ ((senpgain << NVALUERECIPROCAL_SENPGAIN_SHIFT) |
++ (senngain << NVALUERECIPROCAL_SENNGAIN_SHIFT) |
++ (rnsenp << NVALUERECIPROCAL_RNSENP_SHIFT) |
++ (rnsenn << NVALUERECIPROCAL_RNSENN_SHIFT));
++
++#endif
++ }
++
++}
++
++static void sr_configure_vp(int srid)
++{
++ u32 vpconfig;
++
++ if (srid == SR1) {
++ vpconfig = PRM_VP1_CONFIG_ERROROFFSET | PRM_VP1_CONFIG_ERRORGAIN
++ | PRM_VP1_CONFIG_INITVOLTAGE | PRM_VP1_CONFIG_TIMEOUTEN;
++
++ PRM_VP1_CONFIG = vpconfig;
++ PRM_VP1_VSTEPMIN = PRM_VP1_VSTEPMIN_SMPSWAITTIMEMIN |
++ PRM_VP1_VSTEPMIN_VSTEPMIN;
++
++ PRM_VP1_VSTEPMAX = PRM_VP1_VSTEPMAX_SMPSWAITTIMEMAX |
++ PRM_VP1_VSTEPMAX_VSTEPMAX;
++
++ PRM_VP1_VLIMITTO = PRM_VP1_VLIMITTO_VDDMAX |
++ PRM_VP1_VLIMITTO_VDDMIN | PRM_VP1_VLIMITTO_TIMEOUT;
++
++ PRM_VP1_CONFIG |= PRM_VP1_CONFIG_INITVDD;
++ PRM_VP1_CONFIG &= ~PRM_VP1_CONFIG_INITVDD;
++
++ } else if (srid == SR2) {
++ vpconfig = PRM_VP2_CONFIG_ERROROFFSET | PRM_VP2_CONFIG_ERRORGAIN
++ | PRM_VP2_CONFIG_INITVOLTAGE | PRM_VP2_CONFIG_TIMEOUTEN;
++
++ PRM_VP2_CONFIG = vpconfig;
++ PRM_VP2_VSTEPMIN = PRM_VP2_VSTEPMIN_SMPSWAITTIMEMIN |
++ PRM_VP2_VSTEPMIN_VSTEPMIN;
++
++ PRM_VP2_VSTEPMAX = PRM_VP2_VSTEPMAX_SMPSWAITTIMEMAX |
++ PRM_VP2_VSTEPMAX_VSTEPMAX;
++
++ PRM_VP2_VLIMITTO = PRM_VP2_VLIMITTO_VDDMAX |
++ PRM_VP2_VLIMITTO_VDDMIN | PRM_VP2_VLIMITTO_TIMEOUT;
++
++ PRM_VP2_CONFIG |= PRM_VP2_CONFIG_INITVDD;
++ PRM_VP2_CONFIG &= ~PRM_VP2_CONFIG_INITVDD;
++
++ }
++}
++
++static void sr_configure_vc(void)
++{
++ PRM_VC_SMPS_SA =
++ (R_SRI2C_SLAVE_ADDR << PRM_VC_SMPS_SA1_SHIFT) |
++ (R_SRI2C_SLAVE_ADDR << PRM_VC_SMPS_SA0_SHIFT);
++
++ PRM_VC_SMPS_VOL_RA = (R_VDD2_SR_CONTROL << PRM_VC_SMPS_VOLRA1_SHIFT) |
++ (R_VDD1_SR_CONTROL << PRM_VC_SMPS_VOLRA0_SHIFT);
++
++ PRM_VC_CMD_VAL_0 = (PRM_VC_CMD_VAL0_ON << PRM_VC_CMD_ON_SHIFT) |
++ (PRM_VC_CMD_VAL0_ONLP << PRM_VC_CMD_ONLP_SHIFT) |
++ (PRM_VC_CMD_VAL0_RET << PRM_VC_CMD_RET_SHIFT) |
++ (PRM_VC_CMD_VAL0_OFF << PRM_VC_CMD_OFF_SHIFT);
++
++ PRM_VC_CMD_VAL_1 = (PRM_VC_CMD_VAL1_ON << PRM_VC_CMD_ON_SHIFT) |
++ (PRM_VC_CMD_VAL1_ONLP << PRM_VC_CMD_ONLP_SHIFT) |
++ (PRM_VC_CMD_VAL1_RET << PRM_VC_CMD_RET_SHIFT) |
++ (PRM_VC_CMD_VAL1_OFF << PRM_VC_CMD_OFF_SHIFT);
++
++ PRM_VC_CH_CONF = PRM_VC_CH_CONF_CMD1 | PRM_VC_CH_CONF_RAV1;
++
++ PRM_VC_I2C_CFG = PRM_VC_I2C_CFG_MCODE | PRM_VC_I2C_CFG_HSEN
++ | PRM_VC_I2C_CFG_SREN;
++
++ /* Setup voltctrl and other setup times */
++#ifdef CONFIG_SYSOFFMODE
++ PRM_VOLTCTRL = PRM_VOLTCTRL_AUTO_OFF | PRM_VOLTCTRL_AUTO_RET;
++ PRM_CLKSETUP = PRM_CLKSETUP_DURATION;
++ PRM_VOLTSETUP1 = (PRM_VOLTSETUP_TIME2 << PRM_VOLTSETUP_TIME2_OFFSET) |
++ (PRM_VOLTSETUP_TIME1 << PRM_VOLTSETUP_TIME1_OFFSET);
++ PRM_VOLTOFFSET = PRM_VOLTOFFSET_DURATION;
++ PRM_VOLTSETUP2 = PRM_VOLTSETUP2_DURATION;
++#else
++ PRM_VOLTCTRL |= PRM_VOLTCTRL_AUTO_RET;
++#endif
++
++}
++
++
++static void sr_configure(struct omap_sr *sr)
++{
++ u32 sys_clk, sr_clk_length = 0;
++ u32 sr_config;
++ u32 senp_en , senn_en;
++
++ senp_en = sr->senp_mod;
++ senn_en = sr->senn_mod;
++
++ sys_clk = prcm_get_system_clock_speed();
++
++ switch (sys_clk) {
++ case 12000:
++ sr_clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
++ break;
++ case 13000:
++ sr_clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
++ break;
++ case 19200:
++ sr_clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
++ break;
++ case 26000:
++ sr_clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
++ break;
++ case 38400:
++ sr_clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
++ break;
++ default :
++ printk(KERN_ERR "Invalid sysclk value\n");
++ break;
++ }
++
++ DPRINTK(KERN_DEBUG "SR : sys clk %lu\n", sys_clk);
++ if (sr->srid == SR1) {
++ sr_config = SR1_SRCONFIG_ACCUMDATA |
++ (sr_clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
++ SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN |
++ SRCONFIG_MINMAXAVG_EN |
++ (senn_en << SRCONFIG_SENNENABLE_SHIFT) |
++ (senp_en << SRCONFIG_SENPENABLE_SHIFT) |
++ SRCONFIG_DELAYCTRL;
++
++ sr_write_reg(sr, SRCONFIG, sr_config);
++
++ sr_write_reg(sr, AVGWEIGHT, SR1_AVGWEIGHT_SENPAVGWEIGHT |
++ SR1_AVGWEIGHT_SENNAVGWEIGHT);
++
++ sr_modify_re%s
>>> DIFF TRUNCATED @ 16K
#
# mt diff -rd9f9c0225f99c1f7688e60a3a0c39a308c5fc36f -rc5b62589bb3b1863d12fd6f97a2760a1acafd169
#
#
#
# add_dir "packages/freetype/freetype-2.3.6"
#
# add_file "packages/freetype/freetype-2.3.6/fix-configure.patch"
# content [502d57828b1471d37e5682cd5c0c7ace8a4c1b53]
#
# add_file "packages/python/python-gst/import-gobject-instead-of-pygtk.patch"
# content [db291eefc86b7b9ce16681be6307b285e08260a6]
#
# patch "packages/freetype/freetype_2.3.6.bb"
# from [75ff25f85bf78ae5a013dbcd361a18382302aeff]
# to [21f3efc48ae907a7f2b894a59accfeb216990350]
#
# patch "packages/python/python-gst_0.10.10.bb"
# from [567b17a1de7384771221d1f7b1e49482a299d604]
# to [1f6718ef0b284396331b32ae8df4e6e319f69a34]
#
============================================================
--- packages/freetype/freetype-2.3.6/fix-configure.patch 502d57828b1471d37e5682cd5c0c7ace8a4c1b53
+++ packages/freetype/freetype-2.3.6/fix-configure.patch 502d57828b1471d37e5682cd5c0c7ace8a4c1b53
@@ -0,0 +1,13 @@
+Index: freetype-2.3.6/builds/unix/configure.ac
+===================================================================
+--- freetype-2.3.6.orig/builds/unix/configure.ac
++++ freetype-2.3.6/builds/unix/configure.ac
+@@ -506,8 +506,6 @@ AC_SUBST([FT2_EXTRA_LIBS])
+ AC_SUBST([SYSTEM_ZLIB])
+
+
+-LT_INIT(win32-dll)
+-
+ AC_SUBST([hardcode_libdir_flag_spec])
+ AC_SUBST([wl])
+ AC_SUBST([build_libtool_libs])
============================================================
--- packages/python/python-gst/import-gobject-instead-of-pygtk.patch db291eefc86b7b9ce16681be6307b285e08260a6
+++ packages/python/python-gst/import-gobject-instead-of-pygtk.patch db291eefc86b7b9ce16681be6307b285e08260a6
@@ -0,0 +1,19 @@
+Index: gst-python-0.10.10/gst/__init__.py
+===================================================================
+--- gst-python-0.10.10.orig/gst/__init__.py
++++ gst-python-0.10.10/gst/__init__.py
+@@ -28,13 +28,8 @@ try:
+ except:
+ pass
+
+-import sys
++import sys, gobject
+
+-# we always require 2.0 of pygtk; so if pygtk is not imported anywhere
+-# yet, we import pygtk here and .require
+-if 'gobject' not in sys.modules:
+- import pygtk
+- pygtk.require('2.0')
+
+ class Value:
+ def __init__(self, type):
============================================================
--- packages/freetype/freetype_2.3.6.bb 75ff25f85bf78ae5a013dbcd361a18382302aeff
+++ packages/freetype/freetype_2.3.6.bb 21f3efc48ae907a7f2b894a59accfeb216990350
@@ -3,15 +3,16 @@ PR = "r0"
LICENSE = "freetype"
PR = "r0"
-SRC_URI = "${SOURCEFORGE_MIRROR}/freetype/freetype-${PV}.tar.bz2 \
- file://no-hardcode.patch;patch=1 \
- "
-
+SRC_URI = "\
+ ${SOURCEFORGE_MIRROR}/freetype/freetype-${PV}.tar.bz2 \
+ file://no-hardcode.patch;patch=1 \
+ file://fix-configure.patch;patch=1 \
+"
S = "${WORKDIR}/freetype-${PV}"
inherit autotools pkgconfig binconfig
-LIBTOOL = "${S}/builds/unix/${HOST_SYS}-libtool"
+LIBTOOL = "${HOST_SYS}-libtool"
EXTRA_OEMAKE = "'LIBTOOL=${LIBTOOL}'"
EXTRA_OECONF = "--without-zlib"
============================================================
--- packages/python/python-gst_0.10.10.bb 567b17a1de7384771221d1f7b1e49482a299d604
+++ packages/python/python-gst_0.10.10.bb 1f6718ef0b284396331b32ae8df4e6e319f69a34
@@ -2,10 +2,13 @@ DEPENDS = "gstreamer gst-plugins-base py
SECTION = "devel/python"
LICENSE = "LGPL"
DEPENDS = "gstreamer gst-plugins-base python-pygobject"
-PR = "ml1"
+PR = "ml2"
-SRC_URI = "http://gstreamer.freedesktop.org/src/gst-python/gst-python-${PV}.tar.bz2 \
- file://python-path.patch;patch=1"
+SRC_URI = "\
+ http://gstreamer.freedesktop.org/src/gst-python/gst-python-${PV}.tar.bz2 \
+ file://python-path.patch;patch=1 \
+ file://import-gobject-instead-of-pygtk.patch;patch=1 \
+"
S = "${WORKDIR}/gst-python-${PV}"
inherit autotools distutils-base pkgconfig
@@ -30,3 +33,4 @@ FILES_${PN}-examples = "${datadir}/gst-p
"
FILES_${PN}-dbg += "${libdir}/${PYTHON_DIR}/site-packages/gst-0.10/gst/.debug/"
FILES_${PN}-examples = "${datadir}/gst-python/0.10/examples"
+
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