[oe-commits] org.oe.dev u-boot beagleboard: update with latest patches and upstream changes
steve commit
oe at amethyst.openembedded.net
Wed Jun 18 15:10:20 UTC 2008
u-boot beagleboard: update with latest patches and upstream changes
Author: steve at sakoman.com
Branch: org.openembedded.dev
Revision: 0b1f30173cf6f854c752684eb202e6eaf612b465
ViewMTN: http://monotone.openembedded.org/revision/info/0b1f30173cf6f854c752684eb202e6eaf612b465
Files:
1
packages/u-boot/u-boot-git/beagleboard/base.patch
packages/u-boot/u-boot_git.bb
Diffs:
#
# mt diff -ra45026d1f7e19f4cc183bd7a76768f689c18d410 -r0b1f30173cf6f854c752684eb202e6eaf612b465
#
#
#
# patch "packages/u-boot/u-boot-git/beagleboard/base.patch"
# from [2a376b51f55582cc5b5c789d00814ed2c676f152]
# to [df07530c211e06732f6a1cc29550d437d7995ccd]
#
# patch "packages/u-boot/u-boot_git.bb"
# from [f5a6ed35ebbb55acec4098d2f8543f801d9416ab]
# to [1eb87575cc629bb031de6d03bf2a6e4d91660f30]
#
============================================================
--- packages/u-boot/u-boot-git/beagleboard/base.patch 2a376b51f55582cc5b5c789d00814ed2c676f152
+++ packages/u-boot/u-boot-git/beagleboard/base.patch df07530c211e06732f6a1cc29550d437d7995ccd
@@ -1,5 +1,5 @@ diff --git a/Makefile b/Makefile
diff --git a/Makefile b/Makefile
-index cc988e1..16701c5 100644
+index 8bfc891..e9bf61a 100644
--- a/Makefile
+++ b/Makefile
@@ -141,7 +141,7 @@ ifeq ($(ARCH),ppc)
@@ -20,7 +20,7 @@ index cc988e1..16701c5 100644
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
-@@ -2562,6 +2562,12 @@ SMN42_config : unconfig
+@@ -2565,6 +2565,12 @@ SMN42_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292
#########################################################################
@@ -88,10 +88,10 @@ new file mode 100644
+#########################################################################
diff --git a/board/omap3530beagle/clock.c b/board/omap3530beagle/clock.c
new file mode 100644
-index 0000000..964525b
+index 0000000..1f4b4f3
--- /dev/null
+++ b/board/omap3530beagle/clock.c
-@@ -0,0 +1,316 @@
+@@ -0,0 +1,314 @@
+/*
+ * (C) Copyright 2008
+ * Texas Instruments, <www.ti.com>
@@ -121,14 +121,12 @@ index 0000000..964525b
+ */
+
+#include <common.h>
-+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/clocks_omap3.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/sys_proto.h>
-+#include <asm/arch/sys_info.h>
+#include <environment.h>
+#include <command.h>
+
@@ -433,10 +431,10 @@ new file mode 100644
+
diff --git a/board/omap3530beagle/lowlevel_init.S b/board/omap3530beagle/lowlevel_init.S
new file mode 100644
-index 0000000..7ec4d05
+index 0000000..1f9a0e9
--- /dev/null
+++ b/board/omap3530beagle/lowlevel_init.S
-@@ -0,0 +1,361 @@
+@@ -0,0 +1,360 @@
+/*
+ * Board specific setup info
+ *
@@ -468,7 +466,6 @@ index 0000000..7ec4d05
+
+#include <config.h>
+#include <version.h>
-+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks_omap3.h>
+
@@ -800,10 +797,10 @@ new file mode 100644
+
diff --git a/board/omap3530beagle/mem.c b/board/omap3530beagle/mem.c
new file mode 100644
-index 0000000..bee96c3
+index 0000000..fb803be
--- /dev/null
+++ b/board/omap3530beagle/mem.c
-@@ -0,0 +1,251 @@
+@@ -0,0 +1,250 @@
+/*
+ * (C) Copyright 2008
+ * Texas Instruments, <www.ti.com>
@@ -829,7 +826,6 @@ index 0000000..bee96c3
+ */
+
+#include <common.h>
-+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mem.h>
@@ -1057,10 +1053,10 @@ new file mode 100644
+}
diff --git a/board/omap3530beagle/nand.c b/board/omap3530beagle/nand.c
new file mode 100644
-index 0000000..4a8b6e4
+index 0000000..2f94684
--- /dev/null
+++ b/board/omap3530beagle/nand.c
-@@ -0,0 +1,409 @@
+@@ -0,0 +1,408 @@
+/*
+ * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
+ * Rohit Choraria <rohitkc at ti.com>
@@ -1086,7 +1082,6 @@ index 0000000..4a8b6e4
+
+#include <common.h>
+#include <asm/io.h>
-+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+#include <linux/mtd/nand_ecc.h>
+
@@ -1472,10 +1467,10 @@ new file mode 100644
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
diff --git a/board/omap3530beagle/omap3530beagle.c b/board/omap3530beagle/omap3530beagle.c
new file mode 100644
-index 0000000..1daf42c
+index 0000000..7d9a566
--- /dev/null
+++ b/board/omap3530beagle/omap3530beagle.c
-@@ -0,0 +1,781 @@
+@@ -0,0 +1,388 @@
+/*
+ * (C) Copyright 2004-2008
+ * Texas Instruments, <www.ti.com>
@@ -1508,12 +1503,10 @@ index 0000000..1daf42c
+ * MA 02111-1307 USA
+ */
+#include <common.h>
-+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/sys_proto.h>
-+#include <asm/arch/sys_info.h>
+#include <asm/arch/mem.h>
+#include <i2c.h>
+#include <asm/mach-types.h>
@@ -1523,54 +1516,47 @@ index 0000000..1daf42c
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+#endif
+
-+/*
-+ * Dummy functions to handle errors for EABI incompatibility
-+ */
-+void raise(void)
-+{
-+}
++#define NOT_EARLY 0
+
-+void abort(void)
-+{
-+}
++/* Permission values for registers -Full fledged permissions to all */
++#define UNLOCK_1 0xFFFFFFFF
++#define UNLOCK_2 0x00000000
++#define UNLOCK_3 0x0000FFFF
+
-+
-+/*******************************************************
++/******************************************************************************
+ * Routine: delay
+ * Description: spinning delay to use before udelay works
-+ ******************************************************/
++ *****************************************************************************/
+static inline void delay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0"(loops));
+}
+
-+/*****************************************
++/******************************************************************************
+ * Routine: board_init
+ * Description: Early hardware init.
-+ *****************************************/
++ *****************************************************************************/
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
-+ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
-+ gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; /* board id for Linux */
-+ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); /* boot param addr */
++ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
++ /* board id for Linux */
++ gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
++ /* boot param addr */
++ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
+
+ return 0;
+}
+
-+/*****************************************
++/******************************************************************************
+ * Routine: secure_unlock
-+ * Description: Setup security registers for access
-+ * (GP Device only)
-+ *****************************************/
++ * Description: Setup security registers for access
++ * (GP Device only)
++ *****************************************************************************/
+void secure_unlock_mem(void)
+{
-+ /* Permission values for registers -Full fledged permissions to all */
-+#define UNLOCK_1 0xFFFFFFFF
-+#define UNLOCK_2 0x00000000
-+#define UNLOCK_3 0x0000FFFF
+ /* Protection Module Register Target APE (PM_RT) */
+ __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1);
+ __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0);
@@ -1594,12 +1580,12 @@ index 0000000..1daf42c
+ __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */
+}
+
-+/**********************************************************
++/******************************************************************************
+ * Routine: secureworld_exit()
+ * Description: If chip is EMU and boot type is external
+ * configure secure registers and exit secure world
-+ * general use.
-+ ***********************************************************/
++ * general use.
++ *****************************************************************************/
+void secureworld_exit()
+{
+ unsigned long i;
@@ -1624,11 +1610,11 @@ index 0000000..1daf42c
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c1, 0":"=r"(i));
+}
+
-+/**********************************************************
++/******************************************************************************
+ * Routine: setup_auxcr()
+ * Description: Write to AuxCR desired value using SMI.
-+ * general use.
-+ ***********************************************************/
++ * general use.
++ *****************************************************************************/
+void setup_auxcr()
+{
+ unsigned long i;
@@ -1649,11 +1635,11 @@ index 0000000..1daf42c
+ __asm__ __volatile__("mov r12, %0":"=r"(j));
+}
+
-+/**********************************************************
++/******************************************************************************
+ * Routine: try_unlock_sram()
+ * Description: If chip is GP/EMU(special) type, unlock the SRAM for
-+ * general use.
-+ ***********************************************************/
++ * general use.
++ *****************************************************************************/
+void try_unlock_memory()
+{
+ int mode;
@@ -1662,11 +1648,11 @@ index 0000000..1daf42c
+ /* if GP device unlock device SRAM for general use */
+ /* secure code breaks for Secure/Emulation device - HS/E/T */
+ mode = get_device_type();
-+ if (mode == GP_DEVICE) {
++ if (mode == GP_DEVICE)
+ secure_unlock_mem();
-+ }
-+ /* If device is EMU and boot is XIP external booting
-+ * Unlock firewalls and disable L2 and put chip
++
++ /* If device is EMU and boot is XIP external booting
++ * Unlock firewalls and disable L2 and put chip
+ * out of secure world
+ */
+ /* Assuming memories are unlocked by the demon who put us in SDRAM */
@@ -1679,23 +1665,21 @@ index 0000000..1daf42c
+ return;
+}
+
-+/**********************************************************
++/******************************************************************************
+ * Routine: s_init
+ * Description: Does early system init of muxing and clocks.
-+ * - Called path is with SRAM stack.
-+ **********************************************************/
++ * - Called path is with SRAM stack.
++ *****************************************************************************/
+void s_init(void)
+{
+ int in_sdram = running_in_sdram();
+
-+#ifdef CONFIG_3430VIRTIO
-+ in_sdram = 0; /* allow setup from memory for Virtio */
-+#endif
+ watchdog_init();
+
+ try_unlock_memory();
+
-+ /* Right now flushing at low MPU speed. Need to move after clock init */
++ /* Right now flushing at low MPU speed.
++ Need to move after clock init */
+ v7_flush_dcache_all(get_device_type());
+#ifndef CONFIG_ICACHE_OFF
+ icache_enable();
@@ -1723,12 +1707,14 @@ index 0000000..1daf42c
+ if (!in_sdram)
+ sdrc_init();
+}
-+/*******************************************************
++
++/******************************************************************************
+ * Routine: misc_init_r
+ * Description: Init ethernet (done here so udelay works)
-+ ********************************************************/
++ *****************************************************************************/
+int misc_init_r(void)
+{
++
+ unsigned char byte;
+
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
@@ -1757,10 +1743,11 @@ index 0000000..1daf42c
+ return (0);
+}
+
-+/******************************************************
++
++/******************************************************************************
+ * Routine: wait_for_command_complete
+ * Description: Wait for posting to finish on watchdog
-+ ******************************************************/
++ *****************************************************************************/
+void wait_for_command_complete(unsigned int wd_base)
+{
+ int pending = 1;
@@ -1769,15 +1756,15 @@ index 0000000..1daf42c
+ } while (pending);
+}
+
-+/****************************************
++/******************************************************************************
+ * Routine: watchdog_init
+ * Description: Shut down watch dogs
-+ *****************************************/
++ *****************************************************************************/
+void watchdog_init(void)
+{
-+ /* There are 3 watch dogs WD1=Secure, WD2=MPU, WD3=IVA. WD1 is
++ /* There are 3 watch dogs WD1=Secure, WD2=MPU, WD3=IVA. WD1 is
+ * either taken care of by ROM (HS/EMU) or not accessible (GP).
-+ * We need to take care of WD2-MPU or take a PRCM reset. WD3
++ * We need to take care of WD2-MPU or take a PRCM reset. WD3
+ * should not be running and does not generate a PRCM reset.
+ */
+
@@ -1790,68 +1777,28 @@ index 0000000..1daf42c
+ __raw_writel(WD_UNLOCK2, WD2_BASE + WSPR);
+}
+
-+/*******************************************************************
-+ * Routine:ether_init
-+ * Description: take the Ethernet controller out of reset and wait
-+ * for the EEPROM load to complete.
-+ ******************************************************************/
-+void ether_init(void)
-+{
-+#ifdef CONFIG_DRIVER_LAN91C96
-+ int cnt = 20;
-+
-+ __raw_writew(0x0, LAN_RESET_REGISTER);
-+ do {
-+ __raw_writew(0x1, LAN_RESET_REGISTER);
-+ udelay(100);
-+ if (cnt == 0)
-+ goto h4reset_err_out;
-+ --cnt;
-+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x1);
-+
-+ cnt = 20;
-+
-+ do {
-+ __raw_writew(0x0, LAN_RESET_REGISTER);
-+ udelay(100);
-+ if (cnt == 0)
-+ goto h4reset_err_out;
-+ --cnt;
-+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x0000);
-+ udelay(1000);
-+
-+ *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
-+ udelay(1000);
-+
-+ h4reset_err_out:
-+ return;
-+#endif
-+}
-+
-+/**********************************************
++/******************************************************************************
+ * Routine: dram_init
+ * Description: sets uboots idea of sdram size
-+ **********************************************/
++ *****************************************************************************/
+int dram_init(void)
+{
-+#define NOT_EARLY 0
+ DECLARE_GLOBAL_DATA_PTR;
+ unsigned int size0 = 0, size1 = 0;
+ u32 mtype, btype;
+
+ btype = get_board_type();
+ mtype = get_mem_type();
-+#ifndef CONFIG_3430ZEBU
-+ /* fixme... dont know why this func is crashing in ZeBu */
++
+ display_board_info(btype);
-+#endif
-+ /* If a second bank of DDR is attached to CS1 this is
++
++ /* If a second bank of DDR is attached to CS1 this is
+ * where it can be started. Early init code will init
+ * memory on CS0.
+ */
-+ if ((mtype == DDR_COMBO) || (mtype == DDR_STACKED)) {
++ if ((mtype == DDR_COMBO) || (mtype == DDR_STACKED))
+ do_sdrc_init(SDRC_CS1_OSET, NOT_EARLY);
-+ }
++
+ size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+ size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+
@@ -1863,389 +1810,30 @@ index 0000000..1daf42c
+ return 0;
+}
+
-+#define MUX_VAL(OFFSET,VALUE)\
-+ __raw_writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET));
-+
-+#define CP(x) (CONTROL_PADCONF_##x)
-+/*
-+ * IEN - Input Enable
-+ * IDIS - Input Disable
-+ * PTD - Pull type Down
-+ * PTU - Pull type Up
-+ * DIS - Pull type selection is inactive
-+ * EN - Pull type selection is active
-+ * M0 - Mode 0
-+ * The commented string gives the final mux configuration for that pin
-+ */
-+#define MUX_DEFAULT_ES2()\
-+ /*SDRC*/\
-+ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\
-+ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\
-+ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\
-+ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\
-+ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\
-+ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\
-+ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\
-+ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\
-+ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\
-+ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\
-+ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\
-+ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\
-+ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
-+ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\
-+ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\
-+ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\
-+ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\
-+ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\
-+ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\
-+ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\
-+ MUX_VAL(CP(SDRC_D20), (IEN | %s
>>> DIFF TRUNCATED @ 16K
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