[oe-commits] org.oe.dev u-boot-1.1.4: Added additional patches from Atmel AT32STK1000 BSP 2.0.0 CD, mostly LCD/splash support.

likewise commit oe at amethyst.openembedded.net
Thu May 1 13:03:36 UTC 2008


u-boot-1.1.4: Added additional patches from Atmel AT32STK1000 BSP 2.0.0 CD, mostly LCD/splash support.

 u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch   |  112 +
 u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch              |  117 +
 u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch                |   11 
 u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch                      |   16 
 u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch         |  252 ++
 u-boot-1.1.4/at32stk1000/atstk1000-add-lcd-and-spi-to-config.patch           |  124 +
 u-boot-1.1.4/at32stk1000/atstk1000-ltv350qv-display-support.patch            |  163 +
 u-boot-1.1.4/at32stk1000/atstk1000-spi-support.patch                         |   98 
 u-boot-1.1.4/at32stk1000/avr32-boards-fix-flash-read.patch                   |  120 +
 u-boot-1.1.4/at32stk1000/cmd-bmp-add-gzip-compressed-bmp.patch               |   90 
 u-boot-1.1.4/at32stk1000/fix-mmc-data-timeout.patch                          |  101 
 u-boot-1.1.4/at32stk1000/lcd-add-24-bpp-support-and-atmel-lcdc-support.patch |  670 ++++++
 u-boot-1.1.4/at32stk1000/lcdc-driver-for-avr32.patch                         |  755 +++++++
 u-boot-1.1.4/at32stk1000/libavr32-add-spi-and-lcd-board-support.patch        |   61 
 u-boot-1.1.4/at32stk1000/spi-driver-for-avr32.patch                          | 1026 ++++++++++
 u-boot_1.1.4.bb                                                              |   48

Author: likewise at openembedded.org
Branch: org.openembedded.dev
Revision: d935cd87c7c9021470bafc4d24b4faafe4d6c58b
ViewMTN: http://monotone.openembedded.org/revision/info/d935cd87c7c9021470bafc4d24b4faafe4d6c58b
Files:
1
packages/u-boot/u-boot-1.1.4/at32stk1000
packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-add-lcd-and-spi-to-config.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-ltv350qv-display-support.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-spi-support.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/avr32-boards-fix-flash-read.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/cmd-bmp-add-gzip-compressed-bmp.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/fix-mmc-data-timeout.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/lcd-add-24-bpp-support-and-atmel-lcdc-support.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/lcdc-driver-for-avr32.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/libavr32-add-spi-and-lcd-board-support.patch
packages/u-boot/u-boot-1.1.4/at32stk1000/spi-driver-for-avr32.patch
packages/u-boot/u-boot_1.1.4.bb
Diffs:

#
# mt diff -rab470e95662adb7ab2cc12e234b243e2281bde06 -rd935cd87c7c9021470bafc4d24b4faafe4d6c58b
#
#
#
# add_dir "packages/u-boot/u-boot-1.1.4/at32stk1000"
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch"
#  content [264148f2ada6a081fe0b2e071b0edc80d5bb26d3]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch"
#  content [aacb40f62692f7f12d2594259831635533ea5254]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch"
#  content [0dc5903c7cb85cbda2a744d9ded9a86258089d87]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch"
#  content [758d34baadad1b76b6ed1ef398709646af1defbf]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch"
#  content [0905f155e05eba575a0685462783708b8098af55]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-add-lcd-and-spi-to-config.patch"
#  content [174d54cdd69afafd05d72a0fd0c8751d0976a599]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-ltv350qv-display-support.patch"
#  content [c9bf5bf83f39696ee9f981ed85f847334f28c2b1]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-spi-support.patch"
#  content [a1ebfc54a394239909ae56d84e754d7ec80bbac3]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/avr32-boards-fix-flash-read.patch"
#  content [0687dbba73b78ddd353f834a58a26b02ce8f8ef8]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/cmd-bmp-add-gzip-compressed-bmp.patch"
#  content [80f5abd078487b50df179cad3b3d1a0f382b56ae]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/fix-mmc-data-timeout.patch"
#  content [70b1b5f471490abbf21b2c173a9863794616545c]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/lcd-add-24-bpp-support-and-atmel-lcdc-support.patch"
#  content [055ca79e80417f03df63174afb7a707a2e98e5a6]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/lcdc-driver-for-avr32.patch"
#  content [87dc7c19ee654a3223802b457bb82c44ff3c515e]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/libavr32-add-spi-and-lcd-board-support.patch"
#  content [f9cdf2cc1db97cbdcfbb811df1067fb7baec5542]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/spi-driver-for-avr32.patch"
#  content [aaf3a5bcf5a60041e4da853c72c9417adca86a12]
# 
# patch "packages/u-boot/u-boot_1.1.4.bb"
#  from [d038552bd2f9296f6e46ab33c2c4ebb364477fec]
#    to [f33798683ca5789d2b3c96f26805a5f148b78370]
#
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch	264148f2ada6a081fe0b2e071b0edc80d5bb26d3
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch	264148f2ada6a081fe0b2e071b0edc80d5bb26d3
@@ -0,0 +1,112 @@
+diff -uprN u-boot-orig/cpu/at32ap7xxx/ap7000/devices.c u-boot/cpu/at32ap7xxx/ap7000/devices.c
+--- u-boot-orig/cpu/at32ap7xxx/ap7000/devices.c	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/cpu/at32ap7xxx/ap7000/devices.c	2006-12-22 14:51:26.000000000 +0100
+@@ -223,6 +223,46 @@ static const struct resource macb1_resou
+ 	},
+ };
+ #endif
++#if defined(CFG_SPI0)
++static const struct resource spi0_resource[] = {
++	{
++		.type	= RESOURCE_CLOCK,
++		.u	= {
++			.clock	= { CLOCK_APBA, 0 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 6, DEVICE_PIOA, GPIO_FUNC_A, 0 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 1, DEVICE_PIOA, GPIO_FUNC_B, 20 },
++		},
++	},
++};
++#endif
++#if defined(CFG_SPI1)
++static const struct resource spi1_resource[] = {
++	{
++		.type	= RESOURCE_CLOCK,
++		.u	= {
++			.clock	= { CLOCK_APBA, 1 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 6, DEVICE_PIOB, GPIO_FUNC_B, 0 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 1, DEVICE_PIOA, GPIO_FUNC_A, 27 },
++		},
++	},
++};
++#endif
+ #if defined(CFG_LCDC)
+ static const struct resource lcdc_resource[] = {
+ 	{
+@@ -230,6 +270,16 @@ static const struct resource lcdc_resour
+ 		.u	= {
+ 			.clock	= { CLOCK_AHB, 7 },
+ 		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio = { 13, DEVICE_PIOC, GPIO_FUNC_A, 19 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio = { 18, DEVICE_PIOD, GPIO_FUNC_A, 0 },
++		},
+ 	},
+ };
+ #endif
+@@ -390,6 +440,20 @@ const struct device chip_device[] = {
+ 		.resource	= macb0_resource,
+ 	},
+ #endif
++#if defined(CFG_SPI0)
++	[DEVICE_SPI0] = {
++		.regs		= (void *)SPI0_BASE,
++		.nr_resources	= ARRAY_SIZE(spi0_resource),
++		.resource	= spi0_resource,
++	},
++#endif
++#if defined(CFG_SPI1)
++	[DEVICE_SPI1] = {
++		.regs		= (void *)SPI1_BASE,
++		.nr_resources	= ARRAY_SIZE(spi1_resource),
++		.resource	= spi1_resource,
++	},
++#endif
+ #if defined(CFG_MACB1)
+ 	[DEVICE_MACB1] = {
+ 		.regs		= (void *)MACB1_BASE,
+@@ -399,6 +463,7 @@ const struct device chip_device[] = {
+ #endif
+ #if defined(CFG_LCDC)
+ 	[DEVICE_LCDC] = {
++		.regs		= (void *)LCDC_BASE,
+ 		.nr_resources	= ARRAY_SIZE(lcdc_resource),
+ 		.resource	= lcdc_resource,
+ 	},
+diff -uprN u-boot-orig/include/asm-avr32/arch-ap7000/platform.h u-boot/include/asm-avr32/arch-ap7000/platform.h
+--- u-boot-orig/include/asm-avr32/arch-ap7000/platform.h	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/include/asm-avr32/arch-ap7000/platform.h	2006-12-22 14:20:39.000000000 +0100
+@@ -66,6 +66,12 @@ enum device_id {
+ #if defined(CFG_MACB1)
+ 	DEVICE_MACB1,
+ #endif
++#if defined(CFG_SPI0)
++	DEVICE_SPI0,
++#endif
++#if defined(CFG_SPI1)
++	DEVICE_SPI1,
++#endif
+ #if defined(CFG_LCDC)
+ 	DEVICE_LCDC,
+ #endif
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch	aacb40f62692f7f12d2594259831635533ea5254
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch	aacb40f62692f7f12d2594259831635533ea5254
@@ -0,0 +1,117 @@
+Index: u-boot-1.1.4/cpu/at32ap7xxx/hsdramc.c
+===================================================================
+--- u-boot-1.1.4.orig/cpu/at32ap7xxx/hsdramc.c	2007-01-11 15:28:40.000000000 +0100
++++ u-boot-1.1.4/cpu/at32ap7xxx/hsdramc.c	2007-01-11 15:29:36.000000000 +0100
+@@ -133,6 +133,7 @@
+ 	printf("SDRAM: %u MB at address 0x%08lx\n",
+ 	       sdram_size >> 20, info->phys_addr);
+ 
++#ifdef CONFIG_SDRAM_TEST
+ 	printf("Testing SDRAM...");
+ 	for (i = 0; i < sdram_size / 4; i++)
+ 		sdram[i] = i;
+@@ -148,6 +149,7 @@
+ 	}
+ 
+ 	puts("OK\n");
++#endif
+ 
+ 	return sdram_size;
+ }
+Index: u-boot-1.1.4/include/configs/atngw.h
+===================================================================
+--- u-boot-1.1.4.orig/include/configs/atngw.h	2007-01-11 15:28:40.000000000 +0100
++++ u-boot-1.1.4/include/configs/atngw.h	2007-01-30 16:41:23.000000000 +0100
+@@ -31,6 +31,10 @@
+ 
+ #define CONFIG_NGW_EXT_FLASH		1
+ 
++/* Handy macros for making strings */
++#define xstringify(x) #x
++#define stringify(x) xstringify(x)
++
+ /*
+  * Timer clock frequency. We're using the CPU-internal COUNT register
+  * for this, so this is equivalent to the CPU core clock frequency
+@@ -80,9 +84,9 @@
+ 
+ #define CONFIG_BAUDRATE			115200
+ #define CONFIG_BOOTARGS							\
+-	"console=ttyS0 root=/dev/mmcblk0p1"
++	"console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
+ #define CONFIG_BOOTCOMMAND						\
+-	"mmcinit; ext2load mmc 0:1 0x90400000 /uImage; bootm 0x90400000"
++	"fsload 0x90250000 /uImage; bootm 0x90250000"
+ 
+ #define CONFIG_BOOTDELAY		2
+ #define CONFIG_AUTOBOOT			1
+@@ -105,8 +109,8 @@
+  * generated and assigned to the environment variables "ethaddr" and
+  * "eth1addr".
+  */
+-#define CONFIG_ETHADDR			"6a:87:71:14:cd:cb"
+-#define CONFIG_ETH1ADDR			"ca:f8:15:e6:3e:e6"
++#define CONFIG_ETHADDR			"42:b2:13:36:50:94"
++#define CONFIG_ETH1ADDR			"4e:29:49:7e:5c:b9"
+ #define CONFIG_OVERWRITE_ETHADDR_ONCE	1
+ #define CONFIG_NET_MULTI		1
+ 
+@@ -183,6 +187,7 @@
+ 
+ #define CFG_SDRAM_BASE			0x10000000
+ #define CFG_SDRAM_16BIT			1
++#define CONFIG_SDRAM_TEST		1
+ 
+ #define CFG_ENV_IS_IN_FLASH		1
+ #define CFG_ENV_SIZE			65536
+@@ -202,7 +207,7 @@
+ #define CFG_DMA_ALLOC_END		(CFG_MALLOC_START)
+ #define CFG_DMA_ALLOC_START		(CFG_DMA_ALLOC_END - CFG_DMA_ALLOC_LEN)
+ /* Allow 2MB for the kernel run-time image */
+-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
++#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00250000)
+ #define CFG_BOOTPARAMS_LEN		(16 * 1024)
+ 
+ /* Other configuration settings that shouldn't have to change all that often */
+Index: u-boot-1.1.4/include/configs/atstk1002.h
+===================================================================
+--- u-boot-1.1.4.orig/include/configs/atstk1002.h	2007-01-11 15:29:36.000000000 +0100
++++ u-boot-1.1.4/include/configs/atstk1002.h	2007-01-30 16:41:25.000000000 +0100
+@@ -98,7 +98,7 @@
+ #define CFG_CONSOLE_UART_DEV		DEVICE_USART1
+ 
+ /* Define to force consol on serial */
+-/* #define CFG_CONSOLE_ALLWAYS_UART	1 */
++#define CFG_CONSOLE_ALLWAYS_UART	1
+ #ifdef CFG_CONSOLE_ALLWAYS_UART
+ #define CFG_CONSOLE_IS_IN_ENV		1
+ #define CFG_CONSOLE_OVERWRITE_ROUTINE	1
+@@ -123,7 +123,7 @@
+ #endif
+ 
+ #define CONFIG_BOOTCOMMAND						\
+-	"mmcinit; ext2load mmc 0:1 /uImage; bootm"
++	"mmcinit; ext2load mmc 0:1 0x90250000 /uImage; bootm 0x90250000"
+ #define CONFIG_BOOTDELAY		2
+ #define CONFIG_AUTOBOOT			1
+ 
+@@ -145,8 +145,8 @@
+  * generated and assigned to the environment variables "ethaddr" and
+  * "eth1addr".
+  */
+-#define CONFIG_ETHADDR			"6a:87:71:14:cd:cb"
+-#define CONFIG_ETH1ADDR			"ca:f8:15:e6:3e:e6"
++#define CONFIG_ETHADDR			"42:b2:13:36:50:94"
++#define CONFIG_ETH1ADDR			"4e:29:49:7e:5c:b9"
+ #define CONFIG_OVERWRITE_ETHADDR_ONCE	1
+ #define CONFIG_NET_MULTI		1
+ 
+@@ -233,6 +233,8 @@
+ #define CFG_INTRAM_SIZE			0x8000
+ 
+ #define CFG_SDRAM_BASE			0x10000000
++/* Will do SDRAM test if defined */
++#define CONFIG_SDRAM_TEST		1
+ 
+ #define CFG_ENV_IS_IN_FLASH		1
+ #define CFG_ENV_SIZE			65536
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch	0dc5903c7cb85cbda2a744d9ded9a86258089d87
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch	0dc5903c7cb85cbda2a744d9ded9a86258089d87
@@ -0,0 +1,11 @@
+diff -uprN u-boot-orig/include/asm-avr32/global_data.h u-boot/include/asm-avr32/global_data.h
+--- u-boot-orig/include/asm-avr32/global_data.h	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/include/asm-avr32/global_data.h	2006-12-19 11:08:14.000000000 +0100
+@@ -44,6 +44,7 @@ typedef	struct	global_data {
+ 	unsigned long	env_addr;	/* Address of env struct */
+ 	unsigned long	env_valid;	/* Checksum of env valid? */
+ 	unsigned long	cpu_hz;		/* TODO: remove */
++	unsigned long	fb_base;	/* Address to framebuffer */
+ 	void		**jt;
+ } gd_t;
+ 
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch	758d34baadad1b76b6ed1ef398709646af1defbf
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch	758d34baadad1b76b6ed1ef398709646af1defbf
@@ -0,0 +1,16 @@
+diff -uprN u-boot-orig/include/asm-avr32/initcalls.h u-boot/include/asm-avr32/initcalls.h
+--- u-boot-orig/include/asm-avr32/initcalls.h	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/include/asm-avr32/initcalls.h	2007-01-05 13:29:16.000000000 +0100
+@@ -30,6 +30,12 @@ extern void board_init_memories(void);
+ extern void board_init_pio(void);
+ extern void board_init_info(void);
+ 
++#if CONFIG_SPI
++extern void board_init_spi(void);
++#else
++static inline void board_init_spi(void) { }
++#endif
++
+ #if (CONFIG_COMMANDS & CFG_CMD_NET)
+ extern void net_init(void);
+ #else
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch	0905f155e05eba575a0685462783708b8098af55
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch	0905f155e05eba575a0685462783708b8098af55
@@ -0,0 +1,252 @@
+diff -uprN u-boot-orig/include/asm-avr32/arch-ap7000/sm.h u-boot/include/asm-avr32/arch-ap7000/sm.h
+--- u-boot-orig/include/asm-avr32/arch-ap7000/sm.h	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/include/asm-avr32/arch-ap7000/sm.h	2006-12-21 16:28:04.000000000 +0100
+@@ -0,0 +1,248 @@
++/*
++ * Register definitions for SM
++ *
++ * System Manager
++ */
++#ifndef __ASM_AVR32_SM_H__
++#define __ASM_AVR32_SM_H__
++
++/* SM register offsets */
++#define SM_PM_MCCTRL                            0x0000
++#define SM_PM_CKSEL                             0x0004
++#define SM_PM_CPU_MASK                          0x0008
++#define SM_PM_AHB_MASK                          0x000c
++#define SM_PM_APBA_MASK                         0x0010
++#define SM_PM_APBB_MASK                         0x0014
++#define SM_PM_PLL0                              0x0020
++#define SM_PM_PLL1                              0x0024
++#define SM_PM_VCTRL                             0x0030
++#define SM_PM_VMREF                             0x0034
++#define SM_PM_VMV                               0x0038
++#define SM_PM_IER                               0x0040
++#define SM_PM_IDR                               0x0044
++#define SM_PM_IMR                               0x0048
++#define SM_PM_ISR                               0x004c
++#define SM_PM_ICR                               0x0050
++#define SM_PM_GCCTRL                            0x0060
++#define SM_PM_GCCTRL0                           0x0060
++#define SM_PM_GCCTRL1                           0x0064
++#define SM_PM_GCCTRL2                           0x0068
++#define SM_PM_GCCTRL3                           0x006c
++#define SM_PM_GCCTRL4                           0x0070
++#define SM_PM_GCCTRL5                           0x0074
++#define SM_PM_GCCTRL6                           0x0078
++#define SM_PM_GCCTRL7                           0x007c
++#define SM_RTC_CTRL                             0x0080
++#define SM_RTC_VAL                              0x0084
++#define SM_RTC_TOP                              0x0088
++#define SM_RTC_IER                              0x0090
++#define SM_RTC_IDR                              0x0094
++#define SM_RTC_IMR                              0x0098
++#define SM_RTC_ISR                              0x009c
++#define SM_RTC_ICR                              0x00a0
++#define SM_WDT_CTRL                             0x00b0
++#define SM_WDT_CLR                              0x00b4
++#define SM_WDT_EXT                              0x00b8
++#define SM_RC_RCAUSE                            0x00c0
++#define SM_EIM_IER                              0x0100
++#define SM_EIM_IDR                              0x0104
++#define SM_EIM_IMR                              0x0108
++#define SM_EIM_ISR                              0x010c
++#define SM_EIM_ICR                              0x0110
++#define SM_EIM_MODE                             0x0114
++#define SM_EIM_EDGE                             0x0118
++#define SM_EIM_LEVEL                            0x011c
++#define SM_EIM_TEST                             0x0120
++#define SM_EIM_NMIC                             0x0124
++
++/* Bitfields in PM_MCCTRL */
++
++/* Bitfields in PM_CKSEL */
++#define SM_CPUSEL_OFFSET                        0
++#define SM_CPUSEL_SIZE                          3
++#define SM_CPUDIV_OFFSET                        7
++#define SM_CPUDIV_SIZE                          1
++#define SM_AHBSEL_OFFSET                        8
++#define SM_AHBSEL_SIZE                          3
++#define SM_AHBDIV_OFFSET                        15
++#define SM_AHBDIV_SIZE                          1
++#define SM_APBASEL_OFFSET                       16
++#define SM_APBASEL_SIZE                         3
++#define SM_APBADIV_OFFSET                       23
++#define SM_APBADIV_SIZE                         1
++#define SM_APBBSEL_OFFSET                       24
++#define SM_APBBSEL_SIZE                         3
++#define SM_APBBDIV_OFFSET                       31
++#define SM_APBBDIV_SIZE                         1
++
++/* Bitfields in PM_CPU_MASK */
++
++/* Bitfields in PM_AHB_MASK */
++
++/* Bitfields in PM_APBA_MASK */
++
++/* Bitfields in PM_APBB_MASK */
++
++/* Bitfields in PM_PLL0 */
++#define SM_PLLEN_OFFSET                         0
++#define SM_PLLEN_SIZE                           1
++#de%s
>>> DIFF TRUNCATED @ 16K






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