[oe-commits] org.oe.dev linux-omap2 git: enable L2 caches on beagleboard in kernel, instead of depending on u-boot

[koen commit]

linux-omap2 git: enable L2 caches on beagleboard in kernel, instead of depending on u-boot

Author: koen at openembedded.org
Branch: org.openembedded.dev
Revision: 0572af61c63b5dc2e92513e07bdb48c2537e3d31
ViewMTN: http://monotone.openembedded.org/revision/info/0572af61c63b5dc2e92513e07bdb48c2537e3d31
Files:
1
packages/linux/linux-omap2-git/beagleboard/l2-cache.patch
packages/linux/linux-omap2_git.bb
Diffs:

#
# mt diff -r04208912bb82173c9a9b7fbe02dc7929c3e58484 -r0572af61c63b5dc2e92513e07bdb48c2537e3d31
#
#
#
# add_file "packages/linux/linux-omap2-git/beagleboard/l2-cache.patch"
#  content [d6003f16c293392c2b1bb62d8e05ec0d2c77ac3d]
# 
# patch "packages/linux/linux-omap2_git.bb"
#  from [95a249820dd271ec320b8852a3e94624874ade1e]
#    to [7a39d0ef4c7985483f4482973e1604b71e56b7e3]
#
============================================================
--- packages/linux/linux-omap2-git/beagleboard/l2-cache.patch	d6003f16c293392c2b1bb62d8e05ec0d2c77ac3d
+++ packages/linux/linux-omap2-git/beagleboard/l2-cache.patch	d6003f16c293392c2b1bb62d8e05ec0d2c77ac3d
@@ -0,0 +1,38 @@
+diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
+index 15066c2..70f85c1 100644
+--- a/arch/arm/mm/Kconfig
++++ b/arch/arm/mm/Kconfig
+@@ -665,6 +665,12 @@ config CPU_CACHE_ROUND_ROBIN
+ 	  Say Y here to use the predictable round-robin cache replacement
+ 	  policy.  Unless you specifically require this or are unsure, say N.
+ 
++config CPU_L2CACHE_DISABLE
++	bool "Disable level 2 cache"
++	depends on CPU_V7
++	help
++	  Say Y here to disable the level 2 cache.  If unsure, say N.
++
+ config CPU_BPREDICT_DISABLE
+ 	bool "Disable branch prediction"
+ 	depends on CPU_ARM1020 || CPU_V6 || CPU_XSC3 || CPU_V7
+diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
+index a1d7331..432ddab 100644
+--- a/arch/arm/mm/proc-v7.S
++++ b/arch/arm/mm/proc-v7.S
+@@ -181,6 +181,16 @@ __v7_setup:
+ 	mcr	p15, 0, r4, c2, c0, 1		@ load TTB1
+ 	mov	r10, #0x1f			@ domains 0, 1 = manager
+ 	mcr	p15, 0, r10, c3, c0, 0		@ load domain access register
++#ifndef CONFIG_CPU_L2CACHE_DISABLE
++	@ L2 cache configuration in the L2 aux control register
++	mrc	p15, 1, r10, c9, c0, 2
++	bic	r10, r10, #(1 << 16)		@ L2 outer cache
++	mcr	p15, 1, r10, c9, c0, 2
++	@ L2 cache is enabled in the aux control register
++	mrc	p15, 0, r10, c1, c0, 1
++	orr	r10, r10, #2
++	mcr	p15, 0, r10, c1, c0, 1
++#endif
+ #endif
+ 	adr	r5, v7_crval
+ 	ldmia	r5, {r5, r6}
============================================================
--- packages/linux/linux-omap2_git.bb	95a249820dd271ec320b8852a3e94624874ade1e
+++ packages/linux/linux-omap2_git.bb	7a39d0ef4c7985483f4482973e1604b71e56b7e3
@@ -5,7 +5,7 @@ PV = "2.6.25+git${SRCREV}"
 SRCREV = "547ba9200727d2334f779cbf46ab62accb1281aa"
 
 PV = "2.6.25+git${SRCREV}"
-PR = "r6"
+PR = "r7"
 
 
 SRC_URI = "git://source.mvista.com/git/linux-omap-2.6.git;protocol=git \
@@ -13,6 +13,7 @@ SRC_URI_append_beagleboard = " file://no
 
 SRC_URI_append_beagleboard = " file://no-harry-potter.diff;patch=1 \
 			       file://usb-timout.patch;patch=1 \
+			       file://l2-cache.patch;patch=1 \ 	
 "
 
 COMPATIBLE_MACHINE = "omap2430sdp|omap2420h4|beagleboard"