[oe-commits] Marcin Juszkiewicz : gcc: update Maverick Crunch support to 20090908 version
git version control
git at git.openembedded.org
Wed Sep 30 17:06:44 UTC 2009
Module: openembedded.git
Branch: org.openembedded.dev
Commit: a261b5ea923854b9a84f91cec0177ff57e905c98
URL: http://gitweb.openembedded.net/?p=openembedded.git&a=commit;h=a261b5ea923854b9a84f91cec0177ff57e905c98
Author: Marcin Juszkiewicz <marcin at juszkiewicz.com.pl>
Date: Wed Sep 30 15:06:17 2009 +0200
gcc: update Maverick Crunch support to 20090908 version
>From Martin W. Guy page http://martinwguy.co.uk/martin/crunch/
The 20090908 version
* performs single and double precision floating point in the FPU (add, sub,
mul, neg, abs, cmp and conversions from single and double precision floats
to integral types).
* by default, disables the floating point cfnegs and cfnegd instructions,
which fail to convert 0 to -0 as they should. You can re-enable them with
the -funsafe-math-optimizations flag, which is one of those enabled
by -ffast-math (gcc-4.3 has an even more specific -fno-signed-zeros flag,
which is one of those enabled by -funsafe-math-optimizations).
* by default, does not respect denormalised values, so the smallest
representable values are ±2-126 for floats and ±2-1022 for doubles instead of
the usual ±2-149 and ±2-1074.
* has a -mieee flag, which enables handling of denormalized values by disabling
all the buggy instructions. With this, floating point addition, subtraction,
negation, absolute value and conversion between floats and integer types are
performed in software, leaving only floating point multiplication and
comparison performed in hardware.
* has no negative impact on regular ARM code generation.
* always works round the hardware bugs in the FPU and no longer has the
-mcirrus-fix-invalid-insns flag since chip development has stopped and all
existing silicon has the same bugs except for the original revision D0 which
is not supported.
* passes GCC's IEEE testsuite except for the one specific test that checks for
correct handling of denormalized values. With -mieee it passes all the math
tests.
* passes all other testsuites that I've tried (see below) including the
stringent "paranoia" floating point IEEE conformance test.
* produces the fastest Maverick code yet: 5.94 MFLOPS according to FFTW's
tests/bench -opatient cf1024 benchmark and LAME takes 2m25 to encode that
30-second WAV file on a 200MHz EP9307 (compared to 5.4 and 2m30 for the
futaris patches for 4.1.2 and 4.2.0).
* does not use the FPU's buggy 64-bit integer instructions unless the new
-mcirrus-di flag is given. Programs that do a lot of 64-bit integer
operations (add, sub, mul, neg, abs, shifts) may be faster using this, but
rigorous testing will be necessary to ensure that bad code is not being
produced. OpenSSL's testsuite fails if this is enabled. There is more detail
at the head of the arm-crunch-cirrus-di-flag.patch file.
Known bugs
* C: Values held in Maverick registers are not restored when performing a
setjmp/longjmp pair. There is a fix to glibc for this in a message to the
linux-cirrus mailing list.
* C++: Similarly, exception unwinding (performing a throw back to a catch block
in a different function) does not restore floating point and 64-bit values
held in Maverick registers.
* C++: Some C++ files will not compile, saying
".save {mv8}" Error: register expected
although the same files will compile with optimization disabled.
There is a patch to make binutils recognize these registers in the .save
macro in a message to the linux-cirrus mailing list.
---
recipes/gcc/gcc-4.2.4.inc | 45 +-
.../gcc/gcc-4.2.4/arm-crunch-32bit-disable.patch | 85 ---
.../gcc-4.2.4/arm-crunch-64bit-disable-4.2.0.patch | 169 -----
.../gcc/gcc-4.2.4/arm-crunch-64bit-disable0.patch | 47 --
recipes/gcc/gcc-4.2.4/arm-crunch-and-or.patch | 67 --
.../gcc/gcc-4.2.4/arm-crunch-cfcvt64-disable.patch | 19 -
.../gcc/gcc-4.2.4/arm-crunch-cfcvtds-disable.patch | 32 -
.../gcc/gcc-4.2.4/arm-crunch-cirrus-bugfixes.patch | 573 ---------------
recipes/gcc/gcc-4.2.4/arm-crunch-compare-geu.patch | 48 --
.../gcc-4.2.4/arm-crunch-compare-unordered.patch | 98 ---
.../arm-crunch-compare-unordered.patch-z-eq | 98 ---
recipes/gcc/gcc-4.2.4/arm-crunch-compare.patch | 400 -----------
.../gcc/gcc-4.2.4/arm-crunch-compare.patch-z-eq | 400 -----------
recipes/gcc/gcc-4.2.4/arm-crunch-dominance.patch | 12 -
.../gcc-4.2.4/arm-crunch-eabi-ieee754-div.patch | 139 ----
.../gcc/gcc-4.2.4/arm-crunch-eabi-ieee754.patch | 100 ---
recipes/gcc/gcc-4.2.4/arm-crunch-eabi.patch | 64 --
.../arm-crunch-floatsi-disable-single.patch | 38 -
.../gcc/gcc-4.2.4/arm-crunch-floatsi-disable.patch | 61 --
recipes/gcc/gcc-4.2.4/arm-crunch-floatunsidf.patch | 37 -
recipes/gcc/gcc-4.2.4/arm-crunch-fp_consts.patch | 13 -
recipes/gcc/gcc-4.2.4/arm-crunch-neg.patch | 30 -
recipes/gcc/gcc-4.2.4/arm-crunch-neg2.patch | 25 -
recipes/gcc/gcc-4.2.4/arm-crunch-offset.patch | 20 -
recipes/gcc/gcc-4.2.4/arm-crunch-predicates.patch | 20 -
recipes/gcc/gcc-4.2.4/arm-crunch-predicates2.patch | 10 -
recipes/gcc/gcc-4.2.4/arm-crunch-predicates3.patch | 116 ---
recipes/gcc/gcc-4.2.4/arm-crunch-saveregs.patch | 153 ----
recipes/gcc/gcc-4.2.4/arm-crunch-scc.patch | 38 -
.../gcc-4.2.4/arm-crunch-truncsi-disable-new.patch | 33 -
.../gcc/gcc-4.2.4/arm-crunch-truncsi-disable.patch | 56 --
recipes/gcc/gcc-4.2.4/ep93xx/README | 11 +
recipes/gcc/gcc-4.2.4/ep93xx/URL | 1 +
.../{ => ep93xx}/arm-crunch-20000320.patch | 8 +-
.../arm-crunch-arm_dbx_register_number.patch | 17 +
.../gcc-4.2.4/ep93xx/arm-crunch-ccmav-mode.patch | 744 ++++++++++++++++++++
.../ep93xx/arm-crunch-cfcpy-with-cfsh64.patch | 29 +
.../ep93xx/arm-crunch-cftruncd32-attr.patch | 14 +
.../ep93xx/arm-crunch-cirrus-di-flag.patch | 299 ++++++++
.../ep93xx/arm-crunch-disable-cmpdi.patch | 30 +
.../ep93xx/arm-crunch-disable-floatsi.patch | 64 ++
...eabi-ieee754-endian-littleword-littlebyte.patch | 17 +
.../arm-crunch-eabi-mvf0-scratch-ieee754.patch | 85 +++
.../arm-crunch-fix-64bit-const-offsets.patch | 27 +
.../ep93xx/arm-crunch-fix-cirrus-reorg7.patch} | 143 ++--
.../ep93xx/arm-crunch-floatsi-no-scratch.patch | 36 +
.../gcc-4.2.4/ep93xx/arm-crunch-fp_consts.patch | 17 +
.../gcc/gcc-4.2.4/ep93xx/arm-crunch-mieee.patch | 277 ++++++++
.../ep93xx/arm-crunch-movsf-movdf-Uy.patch | 66 ++
.../gcc-4.2.4/ep93xx/arm-crunch-neg-enable.patch | 33 +
.../gcc-4.2.4/ep93xx/arm-crunch-neg-protect.patch | 35 +
.../gcc/gcc-4.2.4/ep93xx/arm-crunch-pipeline.patch | 464 ++++++++++++
.../gcc/gcc-4.2.4/ep93xx/arm-crunch-readme.patch | 109 +++
.../ep93xx/arm-crunch-repair-truncxfsi.patch | 31 +
.../gcc/gcc-4.2.4/ep93xx/arm-crunch-saveregs.patch | 90 +++
.../gcc/gcc-4.2.4/ep93xx/arm-crunch-scratch.patch | 26 +
.../gcc-4.2.4/ep93xx/arm-prologue_use-length.patch | 12 +
recipes/gcc/gcc-4.2.4/ep93xx/arm-size-bugfix.patch | 27 +
recipes/gcc/gcc-4.2.4/ep93xx/series | 26 +
recipes/gcc/gcc-4.3.3.inc | 5 +-
.../ep93xx/arm-crunch-disable-floatsi.patch | 64 ++
...g5.patch => arm-crunch-fix-cirrus-reorg7.patch} | 74 ++-
recipes/gcc/gcc-4.3.3/ep93xx/series | 7 +-
recipes/gcc/gcc-4.3.4.inc | 5 +-
.../ep93xx/arm-crunch-disable-floatsi.patch | 64 ++
...g5.patch => arm-crunch-fix-cirrus-reorg7.patch} | 74 ++-
recipes/gcc/gcc-4.3.4/ep93xx/series | 7 +-
67 files changed, 2927 insertions(+), 3157 deletions(-)
Diff: http://gitweb.openembedded.net/?p=openembedded.git/?a=commitdiff;h=a261b5ea923854b9a84f91cec0177ff57e905c98
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