[oe-commits] Khem Raj : gcc-4.5: Fix asm out of range errors seen on thumb when using -O1
Martin Jansa
martin.jansa at gmail.com
Fri Oct 8 16:37:30 UTC 2010
On Thu, Oct 7, 2010 at 9:46 PM, git version control
<git at git.openembedded.org> wrote:
> Module: openembedded.git
> Branch: master
> Commit: 8e1eef82a09c14668a125c720cfcd354bbeb42cf
> URL: http://gitweb.openembedded.net/?p=openembedded.git&a=commit;h=8e1eef82a09c14668a125c720cfcd354bbeb42cf
>
> Author: Khem Raj <raj.khem at gmail.com>
> Date: Thu Oct 7 12:45:36 2010 -0700
>
> gcc-4.5: Fix asm out of range errors seen on thumb when using -O1
>
> Signed-off-by: Khem Raj <raj.khem at gmail.com>
Not sure if it can be caused by this patch, but after rebuilding dbus
with this gcc I got
SIGILL while starting dbus-daemon --session on armv4t (om-gta02)
Any hints? I'm leaving for weekend so not sure how often I'll be
online or able to debug/test it.
Program received signal SIGILL, Illegal instruction.
0x40041164 in utf8_encoding () from /usr/lib/libexpat.so.1
(gdb) back
#0 0x40041164 in utf8_encoding () from /usr/lib/libexpat.so.1
#1 0x2a00789a in bus_config_parser_content ()
#2 0x400410f8 in features.3438 () from /usr/lib/libexpat.so.1
#3 0x400410f8 in features.3438 () from /usr/lib/libexpat.so.1
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb) disass
Dump of assembler code for function utf8_encoding:
0x400410f8 <+0>: andmi r0, r3, pc, ror #8
0x400410fc <+4>: ldrdmi pc, [r2], -r5
0x40041100 <+8>: andmi r12, r2, r3, lsl r0
0x40041104 <+12>: andmi r12, r2, r5, asr #13
0x40041108 <+16>: andmi r12, r2, sp, ror r5
0x4004110c <+20>: andmi r12, r2, sp, lsl r6
0x40041110 <+24>: andmi r12, r2, r7, lsl r10
0x40041114 <+28>: ; <UNDEFINED> instruction: 0x4002cab9
0x40041118 <+32>: andmi r12, r2, r1, ror #21
0x4004111c <+36>: andmi r12, r2, r3, lsr #22
0x40041120 <+40>: andmi r12, r2, r1, lsl r8
0x40041124 <+44>: andmi pc, r2, r5, ror r0 ; <UNPREDICTABLE>
0x40041128 <+48>: andmi r12, r2, sp, lsl #19
0x4004112c <+52>: andmi r12, r2, r5, asr r11
0x40041130 <+56>: andmi r12, r2, r11, lsr #15
0x40041134 <+60>: ; <UNDEFINED> instruction: 0x4002cbbf
0x40041138 <+64>: andmi r12, r2, r5, lsl #24
0x4004113c <+68>: andeq r0, r0, r1
0x40041140 <+72>: andeq r0, r0, r1
0x40041144 <+76>: andeq r0, r0, r0
0x40041148 <+80>: andeq r0, r0, r0
0x4004114c <+84>: andeq r1, r10, r0, lsl #10
0x40041150 <+88>: andeq r0, r0, r0, lsl #18
0x40041154 <+92>: andeq r0, r0, r0
0x40041158 <+96>: andeq r0, r0, r0
0x4004115c <+100>: andeq r0, r0, r0
0x40041160 <+104>: andeq r0, r0, r0
=> 0x40041164 <+108>: movwne r1, #49173 ; 0xc015
0x40041168 <+112>: stceq 14, cr1, [r3, #-112] ; 0xffffff90
0x4004116c <+116>: eorcs r2, r1, #31
0x40041170 <+120>: tstne r10, r3, lsr #22
0x40041174 <+124>: ldmdbne r9, {r0, r3, r4, r8, r11, r12}
0x40041178 <+128>: ldmdbne r9, {r0, r3, r4, r8, r11, r12}
> recipes/gcc/gcc-4.5.inc | 3 +-
> .../gcc-4.5/thumb-asm-out-of-range-pr43961.patch | 21 ++++++++++++++++++++
> 2 files changed, 23 insertions(+), 1 deletions(-)
>
> diff --git a/recipes/gcc/gcc-4.5.inc b/recipes/gcc/gcc-4.5.inc
> index 36d12ec..0fe53b4 100644
> --- a/recipes/gcc/gcc-4.5.inc
> +++ b/recipes/gcc/gcc-4.5.inc
> @@ -8,7 +8,7 @@ DEPENDS = "mpfr gmp libmpc libelf"
> NATIVEDEPS = "mpfr-native gmp-native libmpc-native"
>
>
> -INC_PR = "r12"
> +INC_PR = "r13"
>
> SRCREV = "164562"
> PV = "4.5"
> @@ -119,6 +119,7 @@ SRC_URI = "svn://gcc.gnu.org/svn/gcc/branches;module=${BRANCH} \
> file://linaro/gcc-4.5-linaro-r99398.patch \
> file://gcc-vmovl-PR45805.patch \
> file://gcc-scalar-widening-pr45847.patch \
> + file://thumb-asm-out-of-range-pr43961.patch \
> "
>
> SRC_URI_append_mips64 = " file://mips64-nomultilib.patch"
> diff --git a/recipes/gcc/gcc-4.5/thumb-asm-out-of-range-pr43961.patch b/recipes/gcc/gcc-4.5/thumb-asm-out-of-range-pr43961.patch
> new file mode 100644
> index 0000000..ec7e823
> --- /dev/null
> +++ b/recipes/gcc/gcc-4.5/thumb-asm-out-of-range-pr43961.patch
> @@ -0,0 +1,21 @@
> +gcc/
> +
> +2010-06-22 Mikael Pettersson <mikpe at it.uu.se>
> +
> + PR target/43961
> + * config/arm/arm.h (ADDR_VEC_ALIGN): Describe added
> + alignment for Thumb-1 compressed switch tables.
> +
> +--- gcc-4.6-20100619/gcc/config/arm/arm.h.~1~ 2010-06-16 20:02:58.000000000 +0200
> ++++ gcc-4.6-20100619/gcc/config/arm/arm.h 2010-06-22 14:03:52.000000000 +0200
> +@@ -2320,7 +2320,8 @@ extern int making_const_table;
> + } while (0)
> +
> + /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
> +-#define ADDR_VEC_ALIGN(JUMPTABLE) 0
> ++#define ADDR_VEC_ALIGN(JUMPTABLE) \
> ++ ((TARGET_THUMB && GET_MODE (PATTERN (JUMPTABLE)) == SImode) ? 2 : 0)
> +
> + /* This is how to output a label which precedes a jumptable. Since
> + Thumb instructions are 2 bytes, we may need explicit alignment here. */
> +
>
>
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