[oe-commits] Khem Raj : gcc-4.5: Fix the ARM ICE regression at -Os -g

git version control git at git.openembedded.org
Fri Sep 23 00:04:01 UTC 2011


Module: openembedded.git
Branch: 2011.03-maintenance
Commit: b1b372482515dd1e0bdcd05108d7be28303065d6
URL:    http://git.openembedded.org/?p=openembedded.git&a=commit;h=b1b372482515dd1e0bdcd05108d7be28303065d6

Author: Khem Raj <raj.khem at gmail.com>
Date:   Thu Mar 17 16:17:09 2011 -0700

gcc-4.5: Fix the ARM ICE regression at -Os -g

This holds off the patches that cause the ICE at -Os -g
for now. The other workaround it to use -fno-shrink-wrap
but it has to go into all affected recipes

Signed-off-by: Khem Raj <raj.khem at gmail.com>
Signed-off-by: Denys Dmytriyenko <denys at ti.com>

---

 recipes/gcc/gcc-4.5.inc                  |    9 ++--
 recipes/gcc/gcc-4.5/more-epilogues.patch |   83 ++++++++++++++++++++++++++++++
 2 files changed, 88 insertions(+), 4 deletions(-)

diff --git a/recipes/gcc/gcc-4.5.inc b/recipes/gcc/gcc-4.5.inc
index 945ce3f..0effe1a 100644
--- a/recipes/gcc/gcc-4.5.inc
+++ b/recipes/gcc/gcc-4.5.inc
@@ -7,7 +7,7 @@ LICENSE = "GPLv3"
 DEPENDS = "mpfr gmp libmpc libelf"
 NATIVEDEPS = "mpfr-native gmp-native libmpc-native"
 
-INC_PR = "r39"
+INC_PR = "r40"
 
 SRCREV = "170880"
 PV = "4.5"
@@ -164,7 +164,7 @@ SRC_URI = "svn://gcc.gnu.org/svn/gcc/branches;module=${BRANCH} \
 	   file://linaro/gcc-4.5-linaro-r99466.patch \
 	   file://linaro/gcc-4.5-linaro-r99468.patch \
 	   file://linaro/gcc-4.5-linaro-r99473.patch \
-	   file://linaro/gcc-4.5-linaro-r99474.patch \
+#	   file://linaro/gcc-4.5-linaro-r99474.patch \
 	   file://linaro/gcc-4.5-linaro-r99475.patch \
 	   file://linaro/gcc-4.5-linaro-r99478.patch \
 	   file://linaro/gcc-4.5-linaro-r99479.patch \
@@ -172,10 +172,11 @@ SRC_URI = "svn://gcc.gnu.org/svn/gcc/branches;module=${BRANCH} \
 	   file://linaro/gcc-4.5-linaro-r99481.patch \
 	   file://linaro/gcc-4.5-linaro-r99482.patch \
 	   file://linaro/gcc-4.5-linaro-r99483.patch \
-	   file://linaro/gcc-4.5-linaro-r99486.patch \
-	   file://linaro/gcc-4.5-linaro-r99487.patch \
+#	   file://linaro/gcc-4.5-linaro-r99486.patch \
+#	   file://linaro/gcc-4.5-linaro-r99487.patch \
 	   file://linaro/gcc-4.5-linaro-r99488.patch \
 	   file://linaro/gcc-4.5-linaro-r99489.patch \
+	   file://more-epilogues.patch \
 	   file://gcc-scalar-widening-pr45847.patch \
 	   file://gcc-arm-volatile-bitfield-fix.patch \
 	  "
diff --git a/recipes/gcc/gcc-4.5/more-epilogues.patch b/recipes/gcc/gcc-4.5/more-epilogues.patch
new file mode 100644
index 0000000..64f1cf3
--- /dev/null
+++ b/recipes/gcc/gcc-4.5/more-epilogues.patch
@@ -0,0 +1,83 @@
+Index: a/gcc/cfgcleanup.c
+===================================================================
+--- a/gcc/cfgcleanup.c	(revision 315947)
++++ b/gcc/cfgcleanup.c	(working copy)
+@@ -1179,13 +1179,19 @@ flow_find_head_matching_sequence (basic_
+ 
+   while (true)
+     {
+-
+-      /* Ignore notes.  */
++      /* Ignore notes, except NOTE_INSN_EPILOGUE_BEG.  */
+       while (!NONDEBUG_INSN_P (i1) && i1 != BB_END (bb1))
+-	i1 = NEXT_INSN (i1);
+-
++	{
++	  if (NOTE_P (i1) && NOTE_KIND (i1) == NOTE_INSN_EPILOGUE_BEG)
++	    break;
++	  i1 = NEXT_INSN (i1);
++	}
+       while (!NONDEBUG_INSN_P (i2) && i2 != BB_END (bb2))
+-	i2 = NEXT_INSN (i2);
++	{
++	  if (NOTE_P (i2) && NOTE_KIND (i2) == NOTE_INSN_EPILOGUE_BEG)
++	    break;
++	  i2 = NEXT_INSN (i2);
++	}
+ 
+       if (NOTE_P (i1) || NOTE_P (i2)
+ 	  || JUMP_P (i1) || JUMP_P (i2))
+Index: a/gcc/cfglayout.c
+===================================================================
+--- a/gcc/cfglayout.c	(revision 315947)
++++ b/gcc/cfglayout.c	(working copy)
+@@ -1295,6 +1295,16 @@ cfg_layout_initialize (unsigned int flag
+       bb->flags |= BB_NON_LOCAL_GOTO_TARGET;
+     }
+ 
++  FOR_EACH_BB (bb)
++    {
++      rtx insn;
++      FOR_BB_INSNS (bb, insn)
++	if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
++	  {
++	    bb->flags |= BB_EPILOGUE_BEGIN;
++	    break;
++	  }
++    }
+   cleanup_cfg (CLEANUP_CFGLAYOUT | flags);
+ }
+ 
+Index: a/gcc/basic-block.h
+===================================================================
+--- a/gcc/basic-block.h	(revision 315947)
++++ b/gcc/basic-block.h	(working copy)
+@@ -332,7 +332,11 @@ enum bb_flags
+ 
+   /* Set on blocks that cannot be threaded through.
+      Only used in cfgcleanup.c.  */
+-  BB_NONTHREADABLE_BLOCK = 1 << 11
++  BB_NONTHREADABLE_BLOCK = 1 << 11,
++
++  /* Set on blocks that have a NOTE_INSN_EPILOGUE_BEGIN.
++     Only used in cfglayout mode.  */
++  BB_EPILOGUE_BEGIN = 1 << 12
+ };
+ 
+ /* Dummy flag for convenience in the hot/cold partitioning code.  */
+Index: a/gcc/cfgrtl.c
+===================================================================
+--- a/gcc/cfgrtl.c	(revision 315947)
++++ b/gcc/cfgrtl.c	(working copy)
+@@ -2707,7 +2707,10 @@ cfg_layout_can_merge_blocks_p (basic_blo
+ 	     not allow us to redirect an edge by replacing a table jump.  */
+ 	  && (!JUMP_P (BB_END (a))
+ 	      || ((!optimize || reload_completed)
+-		  ? simplejump_p (BB_END (a)) : onlyjump_p (BB_END (a)))));
++		  ? simplejump_p (BB_END (a)) : onlyjump_p (BB_END (a))))
++	  /* Don't separate a NOTE_INSN_EPILOGUE_BEG from its returnjump.  */
++	  && (!(b->flags & BB_EPILOGUE_BEGIN)
++	      || returnjump_p (BB_END (b))));
+ }
+ 
+ /* Merge block A and B.  The blocks must be mergeable.  */





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