[oe-commits] [openembedded-core] 20/66: insane: Add entries for riscv 32bit/64bit
git at git.openembedded.org
git at git.openembedded.org
Sun Nov 5 13:56:06 UTC 2017
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rpurdie pushed a commit to branch master-next
in repository openembedded-core.
commit 0e0d0adac1d9303340d7e992cdb02ed7a8127350
Author: Khem Raj <raj.khem at gmail.com>
AuthorDate: Thu Oct 5 17:50:41 2017 -0700
insane: Add entries for riscv 32bit/64bit
Signed-off-by: Khem Raj <raj.khem at gmail.com>
Signed-off-by: Ross Burton <ross.burton at intel.com>
---
meta/classes/insane.bbclass | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/meta/classes/insane.bbclass b/meta/classes/insane.bbclass
index 0a3b528..def9c70 100644
--- a/meta/classes/insane.bbclass
+++ b/meta/classes/insane.bbclass
@@ -94,6 +94,8 @@ def package_qa_get_machine_dict(d):
"mipsisa64r6": ( 8, 0, 0, False, 64),
"mipsisa64r6el": ( 8, 0, 0, True, 64),
"nios2": (113, 0, 0, True, 32),
+ "riscv": (243, 0, 0, True, 32),
+ "riscv64": (243, 0, 0, True, 64),
"s390": (22, 0, 0, False, 32),
"sh4": (42, 0, 0, True, 32),
"sparc": ( 2, 0, 0, False, 32),
@@ -119,6 +121,8 @@ def package_qa_get_machine_dict(d):
"microblaze": (189, 0, 0, False, 32),
"microblazeeb":(189, 0, 0, False, 32),
"microblazeel":(189, 0, 0, True, 32),
+ "riscv": (243, 0, 0, True, 32),
+ "riscv64": (243, 0, 0, True, 64),
"sh4": ( 42, 0, 0, True, 32),
},
"uclinux-uclibc" : {
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