[oe-commits] [meta-openembedded] 07/19: liboil: Fix build on risc-v

[git at git.openembedded.org]

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khem pushed a commit to branch master-next
in repository meta-openembedded.

commit d3d751e8594564451d926902518f54d488777f9c
Author: Khem Raj <raj.khem at gmail.com>
AuthorDate: Tue Mar 5 18:54:57 2019 -0800

    liboil: Fix build on risc-v
    
    Signed-off-by: Khem Raj <raj.khem at gmail.com>
---
 .../liboil/liboil-0.3.17/fix_riscv_unaligned_access.patch | 15 +++++++++++++++
 meta-multimedia/recipes-support/liboil/liboil_0.3.17.bb   |  1 +
 2 files changed, 16 insertions(+)

diff --git a/meta-multimedia/recipes-support/liboil/liboil-0.3.17/fix_riscv_unaligned_access.patch b/meta-multimedia/recipes-support/liboil/liboil-0.3.17/fix_riscv_unaligned_access.patch
new file mode 100644
index 0000000..448bde7
--- /dev/null
+++ b/meta-multimedia/recipes-support/liboil/liboil-0.3.17/fix_riscv_unaligned_access.patch
@@ -0,0 +1,15 @@
+RISC-V supports unaligned accesses, therefore enable it
+
+Upstream-Status: Pending
+Signed-off-by: Khem Raj <raj.khem at gmail.com>
+--- a/m4/as-unaligned-access.m4
++++ b/m4/as-unaligned-access.m4
+@@ -5,7 +5,7 @@ AC_DEFUN([AS_UNALIGNED_ACCESS], [
+   AC_MSG_CHECKING([if unaligned memory access works correctly])
+   if test x"$as_cv_unaligned_access" = x ; then
+     case $host in
+-      alpha*|arm*|hp*|mips*|sh*|sparc*|ia64*)
++      alpha*|arm*|hp*|mips*|riscv*|sh*|sparc*|ia64*)
+         _AS_ECHO_N([(blacklisted) ])
+         as_cv_unaligned_access=no
+ 	;;
diff --git a/meta-multimedia/recipes-support/liboil/liboil_0.3.17.bb b/meta-multimedia/recipes-support/liboil/liboil_0.3.17.bb
index 7e8aa15..654ee1e 100644
--- a/meta-multimedia/recipes-support/liboil/liboil_0.3.17.bb
+++ b/meta-multimedia/recipes-support/liboil/liboil_0.3.17.bb
@@ -18,6 +18,7 @@ SRC_URI = "http://liboil.freedesktop.org/download/${BPN}-${PV}.tar.gz \
            file://0001-Fix-enable-vfp-flag.patch \
            file://liboil_fix_for_x32.patch \
            file://0001-math_vfp_asm.S-Convert-fldmia-fstmia-instructions-to.patch \
+           file://fix_riscv_unaligned_access.patch \
            "
 
 SRC_URI[md5sum] = "47dc734f82faeb2964d97771cfd2e701"

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