[oe-commits] [openembedded-core] 60/64: go: Disable PIE on RISCV

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rpurdie pushed a commit to branch master
in repository openembedded-core.

commit d46a43c6bf4131f2bf7224931664e49aca46bce7
Author: Khem Raj <raj.khem at gmail.com>
AuthorDate: Sun Jan 26 11:27:50 2020 -0800

    go: Disable PIE on RISCV
    
    Its not supported yet
    
    Signed-off-by: Khem Raj <raj.khem at gmail.com>
    Signed-off-by: Richard Purdie <richard.purdie at linuxfoundation.org>
---
 meta/recipes-devtools/go/go_1.13.bb | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/meta/recipes-devtools/go/go_1.13.bb b/meta/recipes-devtools/go/go_1.13.bb
index 483e2e2..5d40cf9 100644
--- a/meta/recipes-devtools/go/go_1.13.bb
+++ b/meta/recipes-devtools/go/go_1.13.bb
@@ -3,11 +3,11 @@ require go-target.inc
 
 export GOBUILDMODE=""
 
-# Add pie to GOBUILDMODE to satisfy "textrel" QA checking, but mips
-# doesn't support -buildmode=pie, so skip the QA checking for mips and its
+# Add pie to GOBUILDMODE to satisfy "textrel" QA checking, but mips/riscv
+# doesn't support -buildmode=pie, so skip the QA checking for mips/riscv and its
 # variants.
 python() {
-    if 'mips' in d.getVar('TARGET_ARCH',True):
+    if 'mips' in d.getVar('TARGET_ARCH',True) or 'riscv' in d.getVar('TARGET_ARCH',True):
         d.appendVar('INSANE_SKIP_%s' % d.getVar('PN',True), " textrel")
     else:
         d.setVar('GOBUILDMODE', 'pie')

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