[OE-core] [PATCH 2/2] gcc: Avoid non-aligned access for ARM5e

[Jens Rehsack]

> Am 08.10.2015 um 16:46 schrieb Khem Raj <raj.khem at gmail.com>:
> 
> 
>> On Oct 8, 2015, at 7:33 AM, Jens Rehsack <rehsack at gmail.com> wrote:
>> 
>> 
>> [Icedtee Ticket #2153] -- see http://icedtea.classpath.org/bugzilla/show_bug.cgi?id=2153
>> 
>> This patch prevents gcc generate code on ARM5e accessing 64 bit values, because gcc doesn't ensure they're 64 bit aligned.
>> Accessing a 64 bit value from a 32 bit alignment causes segmentation faults.
>> 
>> Patch is taken from https://github.com/archlinuxarm/PKGBUILDs/blob/master/core/gcc/0001-ARMv5-disable-LDRD-STRD.patch
> 
> Can you try using -mfix-cortex-m3-ldrd, does that help ?

Well, I have a marvel-kirkwood - I'll give it a shot but don't know whether it works at all.

> The patch is a workaround to gcc, as it seems real problem is in defining instruction constraints
> please open a gcc bug for this.

Dunno whether I want to have all that stress. When neither ARCH linux guys did that nor Icedtea
maintainers, how could I succeed there?

Best I can do is (if -mfix-cortex-m3-ldrd doesn't help), keep it private. When -mfix-cortex-m3-ldrd
helps, is adding it to ./meta/conf/machine/include/tune-arm926ejs.inc a sane approach?

Cheers
-- 
Jens Rehsack - rehsack at gmail.com