[OE-core] [PATCH 0/4] Recipes for Open Source Verilog and Lattice iCE40 FPGAs tools

Khem Raj raj.khem at gmail.com
Wed Sep 13 01:24:48 UTC 2017


On Tue, Sep 12, 2017 at 4:42 PM, Trevor Woerner <twoerner at gmail.com> wrote:
> On Tue, Sep 12, 2017 at 4:21 PM, Khem Raj <raj.khem at gmail.com> wrote:
>> On Mon, Sep 11, 2017 at 1:58 AM, Burton, Ross <ross.burton at intel.com> wrote:
>>> On 10 September 2017 at 14:14, Nathan Rossi <nathan at nathanrossi.com> wrote:
>>>>
>>>> Please note whilst this series is sent for oe-core it may be better
>>>> located in another layer? (e.g. meta-oe). However since the recipes and
>>>> the tools they build are not specific to a single BSP it did not make
>>>> sense to keep in a BSP specific layer.
>>>
>>>
>>> Sounds like a dedicated FPGA layer would be ideal.
>>>
>>
>> I think a layer for 2 recipes might be too much. Put it under recipes-devtools
>> in meta-oe for now.
>
> 5?
>
> Am I reading this patch correctly? There are 5 recipes?

2 or 5 doesnt matter I just meant "too few to be a layer of its own"
engineers minds :)



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