[OE-core] qemu 4.1 boot regression with riscv/musl

[Khem Raj]

On Tue, Sep 24, 2019 at 6:09 PM Alistair Francis <alistair23 at gmail.com>
wrote:

> I raised the regression on the QEMU mailing list while I was preparing
> the revert for QEMU and Palmer pointed out this diff for musl:
>
> diff --git a/arch/riscv64/atomic_arch.h b/arch/riscv64/atomic_arch.h
> index c9765342..41ad4d04 100644
> --- a/arch/riscv64/atomic_arch.h
> +++ b/arch/riscv64/atomic_arch.h
> @@ -14,7 +14,7 @@ static inline int a_cas(volatile int *p, int t, int s)
>                 "       sc.w.aqrl %1, %4, (%2)\n"
>                 "       bnez %1, 1b\n"
>                 "1:"
> -               : "=&r"(old), "=r"(tmp)
> +               : "=&r"(old), "=&r"(tmp)
>                 : "r"(p), "r"(t), "r"(s)
>                 : "memory");
>         return old;
> @@ -31,7 +31,7 @@ static inline void *a_cas_p(volatile void *p, void
> *t, void *s)
>                 "       sc.d.aqrl %1, %4, (%2)\n"
>                 "       bnez %1, 1b\n"
>                 "1:"
> -               : "=&r"(old), "=r"(tmp)
> +               : "=&r"(old), "=&r"(tmp)
>                 : "r"(p), "r"(t), "r"(s)
>                 : "memory");
>         return old;
>
> This seems to fix the problem for me. Hopefully Palmer will prepare a
> patch then we can just cherry pick that (from the list) on musl in OE
> core.
>
> I'm not going to send out the QEMU revert patch.
>

This is fine I think we were discussing atomics at musl IRC I will take
this patch to discussions

>
> Alistair
>
> On Mon, Sep 23, 2019 at 10:12 PM Khem Raj <raj.khem at gmail.com> wrote:
> >
> > Please send a patch
> >
> > On Mon, Sep 23, 2019 at 9:58 PM Alistair Francis <alistair23 at gmail.com>
> wrote:
> > >
> > > On Mon, Sep 23, 2019 at 7:11 PM Khem Raj <raj.khem at gmail.com> wrote:
> > > >
> > > > On Mon, Sep 23, 2019 at 6:39 PM Alistair Francis
> > > > <Alistair.Francis at wdc.com> wrote:
> > > > >
> > > > > On Mon, 2019-09-23 at 17:59 -0700, Alistair Francis wrote:
> > > > > > On Mon, Sep 23, 2019 at 3:40 PM Khem Raj <raj.khem at gmail.com>
> wrote:
> > > > > > > Alistair,
> > > > > > >
> > > > > > > OE-core qemu upgrade to 4.1 has ended up with regressing
> musl/riscv
> > > > > > > port. I could pin point it to
> > > > > > >
> > > > > > >
> https://git.openembedded.org/openembedded-core/commit/?id=50a7dec95618080962e56fd347f505e691b7ad6f
> > > > > > >
> > > > > > > it works fine with 4.0, I havent looked further
> > > > > > >
> > > > > > > To reproduce
> > > > > > >
> > > > > > > build
> > > > > > > MACHINE=qemuriscv64 TCLIBC=musl  bitbake core-image-minimal
> > > > > > > TCLIBC=musl runqemu nographic
> > > > > >
> > > > > > Thanks, I can reproduce this and am bisecting QEMU now.
> > > > >
> > > > > This QEMU patch causes the failure. It reverts cleanly on master
> and
> > > > > that fixes the issue:
> > > > >
> > > > > RISC-V: Clear load reservations on context switch and SC
> > > > >
> > > > > This prevents a load reservation from being placed in one
> > > > > context/process,
> > > > > then being used in another, resulting in an SC succeeding
> incorrectly
> > > > > and
> > > > > breaking atomics.
> > > > >
> > > > > Signed-off-by: Joel Sing <joel at sing.id.au>
> > > > > Reviewed-by: Palmer Dabbelt <palmer at sifive.com>
> > > > > Reviewed-by: Richard Henderson <richard.henderson at linaro.org>
> > > > > Signed-off-by: Palmer Dabbelt <palmer at sifive.com>
> > > > >
> > > > > I'll investigate a full solution tomorrow, in the mean time do you
> want
> > > > > to just revert the patch?
> > > >
> > > > yes lets use the revert for now, this will give you enough time to
> > > > investigate solution
> > > > since its riscv specific it will be low risk and we can even go to
> 3.0
> > > > release with it
> > >
> > > Do you want me to prepare a patch or do you want to do it?
> > >
> > > Alistair
> > >
> > > >
> > > > >
> > > > > Alistair
> > > > >
> > > > > >
> > > > > > Alistair
> > > > > >
> > > > > > > Thanks
> > > > > > > -Khem
> > > > > > > --
> > > > > > > _______________________________________________
> > > > > > > Openembedded-core mailing list
> > > > > > > Openembedded-core at lists.openembedded.org
> > > > > > >
> http://lists.openembedded.org/mailman/listinfo/openembedded-core
>
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